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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2023-03-21 16:49:57 +0530 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-03-22 22:16:24 -0700 |
| commit | 2e20e764f24e12cf906f6fe61d79d1bcb69d6b65 (patch) | |
| tree | 0e2c81f2b88a9319e5df9f7a300007e0cfe70017 /tools/perf/scripts/python/task-analyzer.py | |
| parent | e0f72db37547d605d66c344c4d01a39ad4b7c4be (diff) | |
net: ethernet: ti: am65-cpsw: Enable SGMII mode for J7200
TI's J7200 SoC supports SGMII mode with the CPSW5G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the extra_modes
member of the "j7200_cpswxg_pdata" SoC data.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions