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authorApurva Nandan <a-nandan@ti.com>2023-10-01 23:44:13 +0530
committerVignesh Raghavendra <vigneshr@ti.com>2023-10-05 20:44:41 +0530
commit35fa951c89f6abcb74f73643940b2656c0921353 (patch)
tree9b2bbef25d6ec55918dec9174d8bec42dc57c509 /tools/perf/scripts/python/task-analyzer.py
parent3328b0419815bcc0c6d93c66f9c11eefca42a59b (diff)
arm64: dts: ti: k3-j721s2-som-p0: Add DDR carveout memory nodes for C71x DSPs
Two carveout reserved memory nodes each have been added for each of the C71x DSP for the TI J721S2 EVM boards. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The C71x DSP processor supports a MMU called CMMU, but is not currently supported and as such requires the exact memory used by the firmware to be set-aside. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-6-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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