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authorAlvin Lee <alvin.lee2@amd.com>2023-07-12 17:22:25 -0400
committerAlex Deucher <alexander.deucher@amd.com>2023-07-25 16:20:59 -0400
commit4509e69a07761d08df7c46d4a08c8222522b1933 (patch)
treee32e4dec5e2369ffe7326dc7ac01127a812ee6ac /tools/perf/scripts/python/task-analyzer.py
parent25b054c3c89cb6a7106a7982f0f70e83d0797dab (diff)
drm/amd/display: Don't apply FIFO resync W/A if rdivider = 0
[Description] It is not valid to set the WDIVIDER value to 0, so do not re-write to DISPCLK_WDIVIDER if the current value is 0 (i.e., it is at it's initial value and we have not made any requests to change DISPCLK yet). Reviewed-by: Saaem Rizvi <syedsaaem.rizvi@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
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