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author | Martin Povišer <povik+lin@cutebit.org> | 2022-10-19 15:23:24 +0200 |
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committer | Vinod Koul <vkoul@kernel.org> | 2022-10-19 22:24:57 +0530 |
commit | 568aa6dd641f63166bb60d769e256789b3ac42d4 (patch) | |
tree | 9c4e3d7a5c1ca8dbd7960a00bc9ce3844ae2cd15 /tools/perf/scripts/python/task-analyzer.py | |
parent | 91123b37e8a99cc489d5bdcfebd1c25f29382504 (diff) |
dmaengine: apple-admac: Allocate cache SRAM to channels
There's a previously unknown part of the controller interface: We have
to assign SRAM carveouts to channels to store their in-flight samples
in. So, obtain the size of the SRAM from a read-only register and divide
it into 2K blocks for allocation to channels. The FIFO depths we
configure will always fit into 2K.
(This fixes audio artifacts during simultaneous playback/capture on
multiple channels -- which looking back is fully accounted for by having
had the caches in the DMA controller overlap in memory.)
Fixes: b127315d9a78 ("dmaengine: apple-admac: Add Apple ADMAC driver")
Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Link: https://lore.kernel.org/r/20221019132324.8585-2-povik+lin@cutebit.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions