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authorVinod Govindapillai <vinod.govindapillai@intel.com>2024-11-21 13:27:24 +0200
committerVinod Govindapillai <vinod.govindapillai@intel.com>2024-12-12 09:21:57 +0200
commit7947f4c4f6e91e9b42c9d5954da5fbe543d70aea (patch)
tree01f9f101fe4abacc6549469f3e763d70bbbe2a9f /tools/perf/scripts/python/task-analyzer.py
parent0937c6e7113e07a67301b809ec824b032b3821bb (diff)
drm/i915/display: update to plane_wm register access function
Future platforms can have new additions in the plane_wm registers. So update skl_wm_level_from_reg_val() to have possiblity for such platform differentiations. This is in preparation for the rest of the patches in this series where hw support for the minimum and interim ddb allocations for async flip is added. Replace all the i915 uses to intel_display in this function while updating this function Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241121112726.510220-2-vinod.govindapillai@intel.com
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