diff options
| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2023-01-04 16:04:30 +0530 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2023-01-05 12:12:19 +0100 |
| commit | c85b53e32c8ecfe6292db702ba28e8a00ca90011 (patch) | |
| tree | 8d8d743cf4eb90fe8eb753e4981600e76e5ef5d2 /tools/perf/scripts/python/task-analyzer.py | |
| parent | d75858ef108c3b41f0f3215fe37505bb63e3795d (diff) | |
dt-bindings: net: ti: k3-am654-cpsw-nuss: Add J721e CPSW9G support
Update bindings for TI K3 J721e SoC which contains 9 ports (8 external
ports) CPSW9G module and add compatible for it.
Changes made:
- Add new compatible ti,j721e-cpswxg-nuss for CPSW9G.
- Extend pattern properties for new compatible.
- Change maximum number of CPSW ports to 8 for new compatible.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions