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| author | Vinod Govindapillai <vinod.govindapillai@intel.com> | 2024-12-13 14:03:57 +0200 |
|---|---|---|
| committer | Vinod Govindapillai <vinod.govindapillai@intel.com> | 2024-12-16 15:28:04 +0200 |
| commit | d483fa58991fab33cf7b29d01d8243343dd0e5ad (patch) | |
| tree | 3fc7b749670fa1d2eba9f2694df53516ea5e89cf /tools/perf/scripts/python/task-analyzer.py | |
| parent | 2db03b5c01338be8a5adef42617190a0bb921e75 (diff) | |
drm/i915/xe3: do not configure auto min dbuf for cursor WMs
Cursor planes do not have the minimum dbuf configuration. The
ddb allocation and registration routines handle this correctly.
But the plane wm handling for cursor need to be differentiated
for this case. Auto minimum buf enable bit should not be
enabled for cursor wm registers in xe3.
Fixes: a831920c370c ("drm/i915/xe3: Use hw support for min/interim ddb allocations for async flip")
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241213120357.300584-1-vinod.govindapillai@intel.com
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions