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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2023-03-21 16:49:58 +0530 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-03-22 22:16:24 -0700 |
| commit | 186016da9cca040ae535de09ab1be67e32373443 (patch) | |
| tree | 6618f48332e99d549737ff214205746a5e89417d /tools/perf/scripts/python | |
| parent | 2e20e764f24e12cf906f6fe61d79d1bcb69d6b65 (diff) | |
net: ethernet: ti: am65-cpsw: Enable SGMII mode for J721E
TI's J721E SoC supports SGMII mode with the CPSW9G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the extra_modes
member of the "j721e_cpswxg_pdata" SoC data.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions