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authorChristian Marangi <ansuelsmth@gmail.com>2024-06-20 17:26:43 +0200
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2024-06-27 10:44:29 +0200
commit3de96d810ffd712b7ad2bd764c1390fac2436551 (patch)
tree5f547f7ee7a3df73e4ef59c8fddd1c0cc8b73bc5 /tools/perf/scripts/python
parenta5c05453a13ab324ad8719e8a23dfb6af01f3652 (diff)
dt-bindings: mips: brcm: Document brcm,bmips-cbr-reg property
Document brcm,bmips-cbr-reg property. Some SoC suffer from a BUG where CBR(Core Base Register) address might be badly or never initialized by the Bootloader or reading it from co-processor registers, if the system boots from secondary CPU, results in invalid address. The CBR address is always the same on the SoC. Usage of this property is to give an address also in these broken configuration/bootloader. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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