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authorBibo Mao <maobibo@loongson.cn>2025-01-13 21:37:17 +0800
committerHuacai Chen <chenhuacai@loongson.cn>2025-01-13 21:37:17 +0800
commit4d38d0416ece7bab532e89a49f988a9954f12ee9 (patch)
tree05995660f90db4db0ba3f900fb7d9bf8ea2423cb /tools/perf/scripts/python
parent5bc55a333a2f7316b58edc7573e8e893f7acb532 (diff)
LoongArch: KVM: Clear LLBCTL if secondary mmu mapping is changed
LLBCTL is a separated guest CSR register from host, host exception ERET instruction will clear the host LLBCTL CSR register, and guest exception will clear the guest LLBCTL CSR register. VCPU0 atomic64_fetch_add_unless VCPU1 atomic64_fetch_add_unless ll.d %[p], %[c] beq %[p], %[u], 1f Here secondary mmu mapping is changed, host hpa page is replaced with a new page. And VCPU1 will execute atomic instruction on the new page. ll.d %[p], %[c] beq %[p], %[u], 1f add.d %[rc], %[p], %[a] sc.d %[rc], %[c] add.d %[rc], %[p], %[a] sc.d %[rc], %[c] LLBCTL is set on VCPU0 and it represents the memory is not modified by other VCPUs, sc.d will modify the memory directly. So clear WCLLB of the guest LLBCTL register when mapping is the changed. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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