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authorDillon Varone <Dillon.Varone@amd.com>2022-11-03 18:38:13 -0400
committerAlex Deucher <alexander.deucher@amd.com>2022-11-15 13:35:15 -0500
commitaf54c2142e82717842340574536da042ae168d0b (patch)
tree09aa133935b929c102383e50d8b8949110a8d0ef /tools/perf/scripts/python
parentc9e6aeb5885da86d417ce11e0f54416122665e19 (diff)
drm/amd/display: use uclk pstate latency for fw assisted mclk validation dcn32
[WHY?] DCN32 uses fclk pstate watermarks for dummy pstate, and must always be supported. [HOW?] Validation needs to be run with fclk pstate latency set as the dummy pstate latency to get correct prefetch and bandwidth outputs. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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