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authorConor Dooley <conor.dooley@microchip.com>2025-11-23 18:53:42 +0000
committerConor Dooley <conor.dooley@microchip.com>2025-11-25 22:12:59 +0000
commit76cc0ba2af91c88d36adb4d0a3d5529726353051 (patch)
treee87fb1d8b5e23d408457a6eb59e5dfff9a2b14e2 /tools/testing/selftests/net/lib/py/utils.py
parentd794a761c77b8b611b44e3a6a7556e1050506c4a (diff)
MAINTAINERS: add tree to RISC-V Microchip entry
In fairness to my own employer, lumping it in as "misc" is not quite accurate when they do pay me to look after the platform. Move the tree link for it to its entry, rather than having the RISC-V MISC SOC SUPPORT entry cover it. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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