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-rw-r--r--Documentation/devicetree/bindings/net/mediatek-dwmac.yaml10
-rw-r--r--Documentation/devicetree/bindings/net/snps,dwmac.yaml5
-rw-r--r--arch/arm64/boot/dts/mediatek/mt2712e.dtsi2
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c3
4 files changed, 16 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
index 61b2fb9e141b..0fa2132fa4f4 100644
--- a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
@@ -19,6 +19,7 @@ select:
contains:
enum:
- mediatek,mt2712-gmac
+ - mediatek,mt8188-gmac
- mediatek,mt8195-gmac
required:
- compatible
@@ -37,6 +38,11 @@ properties:
- enum:
- mediatek,mt8195-gmac
- const: snps,dwmac-5.10a
+ - items:
+ - enum:
+ - mediatek,mt8188-gmac
+ - const: mediatek,mt8195-gmac
+ - const: snps,dwmac-5.10a
clocks:
minItems: 5
@@ -74,7 +80,7 @@ properties:
or will round down. Range 0~31*170.
For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550,
or will round down. Range 0~31*550.
- For MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290,
+ For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290,
or will round down. Range 0~31*290.
mediatek,rx-delay-ps:
@@ -84,7 +90,7 @@ properties:
or will round down. Range 0~31*170.
For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550,
or will round down. Range 0~31*550.
- For MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple
+ For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple
of 290, or will round down. Range 0~31*290.
mediatek,rmii-rxc:
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 7fa60e6e14c3..f94a0a4320f1 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -289,6 +289,11 @@ properties:
is supported. For example, this is used in case of SGMII and
MAC2MAC connection.
+ snps,clk-csr:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Frequency division factor for MDC clock.
+
mdio:
$ref: mdio.yaml#
unevaluatedProperties: false
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 4797537cb368..e6d7453e56e0 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -756,7 +756,7 @@
snps,mtl-tx-config = <&mtl_tx_setup>;
snps,txpbl = <1>;
snps,rxpbl = <1>;
- clk_csr = <0>;
+ snps,clk-csr = <0>;
status = "disabled";
};
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index b0b09c77711d..50f6b4a14be4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -444,7 +444,8 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
* or get clk_csr from device tree.
*/
plat->clk_csr = -1;
- of_property_read_u32(np, "clk_csr", &plat->clk_csr);
+ if (of_property_read_u32(np, "snps,clk-csr", &plat->clk_csr))
+ of_property_read_u32(np, "clk_csr", &plat->clk_csr);
/* "snps,phy-addr" is not a standard property. Mark it as deprecated
* and warn of its use. Remove this when phy node support is added.