diff options
| -rw-r--r-- | arch/riscv/boot/dts/spacemit/k1.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index abde8bb07c95..6c68b2e54675 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -667,6 +667,7 @@ clocks = <&syscon_apbc CLK_UART0>, <&syscon_apbc CLK_UART0_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART0>; interrupts = <42>; reg-shift = <2>; reg-io-width = <4>; @@ -680,6 +681,7 @@ clocks = <&syscon_apbc CLK_UART2>, <&syscon_apbc CLK_UART2_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART2>; interrupts = <44>; reg-shift = <2>; reg-io-width = <4>; @@ -693,6 +695,7 @@ clocks = <&syscon_apbc CLK_UART3>, <&syscon_apbc CLK_UART3_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART3>; interrupts = <45>; reg-shift = <2>; reg-io-width = <4>; @@ -706,6 +709,7 @@ clocks = <&syscon_apbc CLK_UART4>, <&syscon_apbc CLK_UART4_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART4>; interrupts = <46>; reg-shift = <2>; reg-io-width = <4>; @@ -719,6 +723,7 @@ clocks = <&syscon_apbc CLK_UART5>, <&syscon_apbc CLK_UART5_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART5>; interrupts = <47>; reg-shift = <2>; reg-io-width = <4>; @@ -732,6 +737,7 @@ clocks = <&syscon_apbc CLK_UART6>, <&syscon_apbc CLK_UART6_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART6>; interrupts = <48>; reg-shift = <2>; reg-io-width = <4>; @@ -745,6 +751,7 @@ clocks = <&syscon_apbc CLK_UART7>, <&syscon_apbc CLK_UART7_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART7>; interrupts = <49>; reg-shift = <2>; reg-io-width = <4>; @@ -758,6 +765,7 @@ clocks = <&syscon_apbc CLK_UART8>, <&syscon_apbc CLK_UART8_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART8>; interrupts = <50>; reg-shift = <2>; reg-io-width = <4>; @@ -771,6 +779,7 @@ clocks = <&syscon_apbc CLK_UART9>, <&syscon_apbc CLK_UART9_BUS>; clock-names = "core", "bus"; + resets = <&syscon_apbc RESET_UART9>; interrupts = <51>; reg-shift = <2>; reg-io-width = <4>; |