diff options
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 4 |
4 files changed, 16 insertions, 16 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 0d243bdf57a9..5651a6290f98 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -104,11 +104,10 @@ static void sun8i_ui_layer_update_coord(struct sun8i_layer *layer, vscale = state->src_h / state->crtc_h; if (mixer->cfg->de_type == SUN8I_MIXER_DE33) { - sun8i_vi_scaler_setup(mixer, layer->channel, src_w, src_h, - dst_w, dst_h, hscale, vscale, - hphase, vphase, + sun8i_vi_scaler_setup(layer, src_w, src_h, dst_w, dst_h, + hscale, vscale, hphase, vphase, state->fb->format); - sun8i_vi_scaler_enable(mixer, layer->channel, true); + sun8i_vi_scaler_enable(layer, true); } else { sun8i_ui_scaler_setup(layer, src_w, src_h, dst_w, dst_h, hscale, vscale, hphase, vphase); @@ -117,7 +116,7 @@ static void sun8i_ui_layer_update_coord(struct sun8i_layer *layer, } else { DRM_DEBUG_DRIVER("HW scaling is not needed\n"); if (mixer->cfg->de_type == SUN8I_MIXER_DE33) - sun8i_vi_scaler_enable(mixer, layer->channel, false); + sun8i_vi_scaler_enable(layer, false); else sun8i_ui_scaler_enable(layer, false); } diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 9ab4306458c6..dd24f9eee685 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -163,13 +163,12 @@ static void sun8i_vi_layer_update_coord(struct sun8i_layer *layer, hscale = (src_w << 16) / dst_w; vscale = (src_h << 16) / dst_h; - sun8i_vi_scaler_setup(mixer, layer->channel, src_w, src_h, dst_w, - dst_h, hscale, vscale, hphase, vphase, - format); - sun8i_vi_scaler_enable(mixer, layer->channel, true); + sun8i_vi_scaler_setup(layer, src_w, src_h, dst_w, dst_h, + hscale, vscale, hphase, vphase, format); + sun8i_vi_scaler_enable(layer, true); } else { DRM_DEBUG_DRIVER("HW scaling is not needed\n"); - sun8i_vi_scaler_enable(mixer, layer->channel, false); + sun8i_vi_scaler_enable(layer, false); } regmap_write(mixer->engine.regs, diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index 82df6244af88..a76677a1649f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -909,11 +909,12 @@ static void sun8i_vi_scaler_set_coeff(struct regmap *map, u32 base, } } -void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable) +void sun8i_vi_scaler_enable(struct sun8i_layer *layer, bool enable) { + struct sun8i_mixer *mixer = layer->mixer; u32 val, base; - base = sun8i_vi_scaler_base(mixer, layer); + base = sun8i_vi_scaler_base(mixer, layer->channel); if (enable) val = SUN8I_SCALER_VSU_CTRL_EN | @@ -925,16 +926,17 @@ void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable) SUN8I_SCALER_VSU_CTRL(base), val); } -void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, +void sun8i_vi_scaler_setup(struct sun8i_layer *layer, u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, u32 hscale, u32 vscale, u32 hphase, u32 vphase, const struct drm_format_info *format) { + struct sun8i_mixer *mixer = layer->mixer; u32 chphase, cvphase; u32 insize, outsize; u32 base; - base = sun8i_vi_scaler_base(mixer, layer); + base = sun8i_vi_scaler_base(mixer, layer->channel); hphase <<= SUN8I_VI_SCALER_PHASE_FRAC - 16; vphase <<= SUN8I_VI_SCALER_PHASE_FRAC - 16; diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h index 68f6593b369a..73eecc4d1b1d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h @@ -69,8 +69,8 @@ #define SUN50I_SCALER_VSU_ANGLE_SHIFT(x) (((x) << 16) & 0xF) #define SUN50I_SCALER_VSU_ANGLE_OFFSET(x) ((x) & 0xFF) -void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable); -void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, +void sun8i_vi_scaler_enable(struct sun8i_layer *layer, bool enable); +void sun8i_vi_scaler_setup(struct sun8i_layer *layer, u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, u32 hscale, u32 vscale, u32 hphase, u32 vphase, const struct drm_format_info *format); |