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-rw-r--r--Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml20
1 files changed, 10 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml
index a758f4bb2bb3..4683bd1293fa 100644
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml
@@ -27,17 +27,17 @@ properties:
additionalProperties: false
properties:
- "#address-cells":
+ '#address-cells':
const: 1
- "#size-cells":
+ '#size-cells':
const: 0
patternProperties:
- "^osc[0-9]$":
+ '^osc[0-9]$':
type: object
- "^[a-z0-9,_]+(clk|pll|clk_gate|clk_divided)(@[a-f0-9]+)?$":
+ '^[a-z0-9,_]+(clk|pll|clk_gate|clk_divided)(@[a-f0-9]+)?$':
type: object
$ref: '#/$defs/clock-props'
unevaluatedProperties: false
@@ -58,14 +58,14 @@ properties:
minItems: 1
maxItems: 5
- "#address-cells":
+ '#address-cells':
const: 1
- "#size-cells":
+ '#size-cells':
const: 0
patternProperties:
- "^[a-z0-9,_]+(clk|pll)(@[a-f0-9]+)?$":
+ '^[a-z0-9,_]+(clk|pll)(@[a-f0-9]+)?$':
type: object
$ref: '#/$defs/clock-props'
unevaluatedProperties: false
@@ -86,11 +86,11 @@ properties:
required:
- compatible
- clocks
- - "#clock-cells"
+ - '#clock-cells'
required:
- compatible
- - "#clock-cells"
+ - '#clock-cells'
required:
- compatible
@@ -104,7 +104,7 @@ $defs:
reg:
maxItems: 1
- "#clock-cells":
+ '#clock-cells':
const: 0
clk-gate: