diff options
Diffstat (limited to 'drivers/thermal/intel')
10 files changed, 284 insertions, 20 deletions
diff --git a/drivers/thermal/intel/int340x_thermal/Makefile b/drivers/thermal/intel/int340x_thermal/Makefile index fe3f43924525..184318d1792b 100644 --- a/drivers/thermal/intel/int340x_thermal/Makefile +++ b/drivers/thermal/intel/int340x_thermal/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_device_pci_legacy.o obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_device_pci.o obj-$(CONFIG_PROC_THERMAL_MMIO_RAPL) += processor_thermal_rapl.o obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_rfim.o +obj-$(CONFIG_INT340X_THERMAL) += platform_temperature_control.o obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_mbox.o obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_wt_req.o obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_wt_hint.o diff --git a/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c b/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c new file mode 100644 index 000000000000..2d6504514893 --- /dev/null +++ b/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c @@ -0,0 +1,243 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * processor thermal device platform temperature controls + * Copyright (c) 2025, Intel Corporation. + */ + +/* + * Platform temperature controls hardware interface + * + * The hardware control interface is via MMIO offsets in the processor + * thermal device MMIO space. There are three instances of MMIO registers. + * All registers are 64 bit wide with RW access. + * + * Name: PLATFORM_TEMPERATURE_CONTROL + * Offsets: 0x5B20, 0x5B28, 0x5B30 + * + * Bits Description + * 7:0 TARGET_TEMP : Target temperature limit to which the control + * mechanism is regulating. Units: 0.5C. + * 8:8 ENABLE: Read current enable status of the feature or enable + * feature. + * 11:9 GAIN: Sets the aggressiveness of control loop from 0 to 7 + * 7 graceful, favors performance at the expense of temperature + * overshoots + * 0 aggressive, favors tight regulation over performance + * 12:12 TEMPERATURE_OVERRIDE_EN + * When set, hardware will use TEMPERATURE_OVERRIDE values instead + * of reading from corresponding sensor. + * 15:13 RESERVED + * 23:16 MIN_PERFORMANCE_LEVEL: Minimum Performance level below which the + * there will be no throttling. 0 - all levels of throttling allowed + * including survivability actions. 255 - no throttling allowed. + * 31:24 TEMPERATURE_OVERRIDE: Allows SW to override the input temperature. + * hardware will use this value instead of the sensor temperature. + * Units: 0.5C. + * 63:32 RESERVED + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/pci.h> +#include "processor_thermal_device.h" + +struct mmio_reg { + int bits; + u16 mask; + u16 shift; + u16 units; +}; + +#define MAX_ATTR_GROUP_NAME_LEN 32 +#define PTC_MAX_ATTRS 3 + +struct ptc_data { + u32 offset; + struct attribute_group ptc_attr_group; + struct attribute *ptc_attrs[PTC_MAX_ATTRS]; + struct device_attribute temperature_target_attr; + struct device_attribute enable_attr; + char group_name[MAX_ATTR_GROUP_NAME_LEN]; +}; + +static const struct mmio_reg ptc_mmio_regs[] = { + { 8, 0xFF, 0, 500}, /* temperature_target, units 0.5C*/ + { 1, 0x01, 8, 0}, /* enable */ + { 3, 0x7, 9, 0}, /* gain */ + { 8, 0xFF, 16, 0}, /* min_performance_level */ + { 1, 0x1, 12, 0}, /* temperature_override_enable */ + { 8, 0xFF, 24, 500}, /* temperature_override, units 0.5C */ +}; + +#define PTC_MAX_INSTANCES 3 + +/* Unique offset for each PTC instance */ +static u32 ptc_offsets[PTC_MAX_INSTANCES] = {0x5B20, 0x5B28, 0x5B30}; + +/* These will represent sysfs attribute names */ +static const char * const ptc_strings[] = { + "temperature_target", + "enable", + NULL +}; + +/* Lock to protect concurrent read/write and read-modify-write */ +static DEFINE_MUTEX(ptc_lock); + +static ssize_t ptc_mmio_show(struct ptc_data *data, struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct proc_thermal_device *proc_priv; + const struct mmio_reg *mmio_regs; + int ret, units; + u64 reg_val; + + proc_priv = pci_get_drvdata(pdev); + mmio_regs = ptc_mmio_regs; + ret = match_string(ptc_strings, -1, attr->attr.name); + if (ret < 0) + return ret; + + units = mmio_regs[ret].units; + + guard(mutex)(&ptc_lock); + + reg_val = readq((void __iomem *) (proc_priv->mmio_base + data->offset)); + ret = (reg_val >> mmio_regs[ret].shift) & mmio_regs[ret].mask; + if (units) + ret *= units; + + return sysfs_emit(buf, "%d\n", ret); +} + +#define PTC_SHOW(suffix)\ +static ssize_t suffix##_show(struct device *dev,\ + struct device_attribute *attr,\ + char *buf)\ +{\ + struct ptc_data *data = container_of(attr, struct ptc_data, suffix##_attr);\ + return ptc_mmio_show(data, dev, attr, buf);\ +} + +static void ptc_mmio_write(struct pci_dev *pdev, u32 offset, int index, u32 value) +{ + struct proc_thermal_device *proc_priv; + u64 mask, reg_val; + + proc_priv = pci_get_drvdata(pdev); + + mask = GENMASK_ULL(ptc_mmio_regs[index].shift + ptc_mmio_regs[index].bits - 1, + ptc_mmio_regs[index].shift); + + guard(mutex)(&ptc_lock); + + reg_val = readq((void __iomem *) (proc_priv->mmio_base + offset)); + reg_val &= ~mask; + reg_val |= (value << ptc_mmio_regs[index].shift); + writeq(reg_val, (void __iomem *) (proc_priv->mmio_base + offset)); +} + +static int ptc_store(struct ptc_data *data, struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct pci_dev *pdev = to_pci_dev(dev); + unsigned int input; + int ret; + + ret = kstrtouint(buf, 10, &input); + if (ret) + return ret; + + ret = match_string(ptc_strings, -1, attr->attr.name); + if (ret < 0) + return ret; + + if (ptc_mmio_regs[ret].units) + input /= ptc_mmio_regs[ret].units; + + if (input > ptc_mmio_regs[ret].mask) + return -EINVAL; + + ptc_mmio_write(pdev, data->offset, ret, input); + + return count; +} + +#define PTC_STORE(suffix)\ +static ssize_t suffix##_store(struct device *dev,\ + struct device_attribute *attr,\ + const char *buf, size_t count)\ +{\ + struct ptc_data *data = container_of(attr, struct ptc_data, suffix##_attr);\ + return ptc_store(data, dev, attr, buf, count);\ +} + +PTC_SHOW(temperature_target); +PTC_STORE(temperature_target); +PTC_SHOW(enable); +PTC_STORE(enable); + +#define ptc_init_attribute(_name)\ + do {\ + sysfs_attr_init(&data->_name##_attr.attr);\ + data->_name##_attr.show = _name##_show;\ + data->_name##_attr.store = _name##_store;\ + data->_name##_attr.attr.name = #_name;\ + data->_name##_attr.attr.mode = 0644;\ + } while (0) + +static int ptc_create_groups(struct pci_dev *pdev, int instance, struct ptc_data *data) +{ + int ret, index = 0; + + ptc_init_attribute(temperature_target); + ptc_init_attribute(enable); + + data->ptc_attrs[index++] = &data->temperature_target_attr.attr; + data->ptc_attrs[index++] = &data->enable_attr.attr; + data->ptc_attrs[index] = NULL; + + snprintf(data->group_name, MAX_ATTR_GROUP_NAME_LEN, + "ptc_%d_control", instance); + data->ptc_attr_group.name = data->group_name; + data->ptc_attr_group.attrs = data->ptc_attrs; + + ret = sysfs_create_group(&pdev->dev.kobj, &data->ptc_attr_group); + + return ret; +} + +static struct ptc_data ptc_instance[PTC_MAX_INSTANCES]; + +int proc_thermal_ptc_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv) +{ + if (proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_PTC) { + int i; + + for (i = 0; i < PTC_MAX_INSTANCES; i++) { + ptc_instance[i].offset = ptc_offsets[i]; + ptc_create_groups(pdev, i, &ptc_instance[i]); + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(proc_thermal_ptc_add); + +void proc_thermal_ptc_remove(struct pci_dev *pdev) +{ + struct proc_thermal_device *proc_priv = pci_get_drvdata(pdev); + + if (proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_PTC) { + int i; + + for (i = 0; i < PTC_MAX_INSTANCES; i++) + sysfs_remove_group(&pdev->dev.kobj, &ptc_instance[i].ptc_attr_group); + } +} +EXPORT_SYMBOL_GPL(proc_thermal_ptc_remove); + +MODULE_IMPORT_NS("INT340X_THERMAL"); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Processor Thermal PTC Interface"); diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c index c868d8b7bd1c..29fcece48cad 100644 --- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c +++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c @@ -9,6 +9,7 @@ #include <linux/module.h> #include <linux/pci.h> #include <linux/thermal.h> +#include <asm/msr.h> #include "int340x_thermal_zone.h" #include "processor_thermal_device.h" #include "../intel_soc_dts_iosf.h" @@ -153,7 +154,7 @@ static ssize_t tcc_offset_degree_celsius_store(struct device *dev, u64 val; int err; - err = rdmsrl_safe(MSR_PLATFORM_INFO, &val); + err = rdmsrq_safe(MSR_PLATFORM_INFO, &val); if (err) return err; @@ -399,13 +400,21 @@ int proc_thermal_mmio_add(struct pci_dev *pdev, } } + if (feature_mask & PROC_THERMAL_FEATURE_PTC) { + ret = proc_thermal_ptc_add(pdev, proc_priv); + if (ret) { + dev_err(&pdev->dev, "failed to add PTC MMIO interface\n"); + goto err_rem_rapl; + } + } + if (feature_mask & PROC_THERMAL_FEATURE_FIVR || feature_mask & PROC_THERMAL_FEATURE_DVFS || feature_mask & PROC_THERMAL_FEATURE_DLVR) { ret = proc_thermal_rfim_add(pdev, proc_priv); if (ret) { dev_err(&pdev->dev, "failed to add RFIM interface\n"); - goto err_rem_rapl; + goto err_rem_ptc; } } @@ -427,6 +436,8 @@ int proc_thermal_mmio_add(struct pci_dev *pdev, err_rem_rfim: proc_thermal_rfim_remove(pdev); +err_rem_ptc: + proc_thermal_ptc_remove(pdev); err_rem_rapl: proc_thermal_rapl_remove(); @@ -439,6 +450,9 @@ void proc_thermal_mmio_remove(struct pci_dev *pdev, struct proc_thermal_device * if (proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_RAPL) proc_thermal_rapl_remove(); + if (proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_PTC) + proc_thermal_ptc_remove(pdev); + if (proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_FIVR || proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_DVFS || proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_DLVR) diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h index ba2d89d3024c..9a6ca43b6fa2 100644 --- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h +++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h @@ -67,6 +67,7 @@ struct rapl_mmio_regs { #define PROC_THERMAL_FEATURE_WT_HINT 0x20 #define PROC_THERMAL_FEATURE_POWER_FLOOR 0x40 #define PROC_THERMAL_FEATURE_MSI_SUPPORT 0x80 +#define PROC_THERMAL_FEATURE_PTC 0x100 #if IS_ENABLED(CONFIG_PROC_THERMAL_MMIO_RAPL) int proc_thermal_rapl_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv); @@ -123,4 +124,6 @@ int proc_thermal_mmio_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv, kernel_ulong_t feature_mask); void proc_thermal_mmio_remove(struct pci_dev *pdev, struct proc_thermal_device *proc_priv); +int proc_thermal_ptc_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv); +void proc_thermal_ptc_remove(struct pci_dev *pdev); #endif diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c index 2097aae39946..00160936070a 100644 --- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c +++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c @@ -486,7 +486,8 @@ static const struct pci_device_id proc_thermal_pci_ids[] = { PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_WT_REQ) }, { PCI_DEVICE_DATA(INTEL, LNLM_THERMAL, PROC_THERMAL_FEATURE_MSI_SUPPORT | PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_DLVR | PROC_THERMAL_FEATURE_DVFS | - PROC_THERMAL_FEATURE_WT_HINT | PROC_THERMAL_FEATURE_POWER_FLOOR) }, + PROC_THERMAL_FEATURE_WT_HINT | PROC_THERMAL_FEATURE_POWER_FLOOR | + PROC_THERMAL_FEATURE_PTC) }, { PCI_DEVICE_DATA(INTEL, MTLP_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_DLVR | PROC_THERMAL_FEATURE_WT_HINT | PROC_THERMAL_FEATURE_POWER_FLOOR) }, @@ -497,7 +498,7 @@ static const struct pci_device_id proc_thermal_pci_ids[] = { { PCI_DEVICE_DATA(INTEL, PTL_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_DLVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_MSI_SUPPORT | PROC_THERMAL_FEATURE_WT_HINT | - PROC_THERMAL_FEATURE_POWER_FLOOR) }, + PROC_THERMAL_FEATURE_POWER_FLOOR | PROC_THERMAL_FEATURE_PTC) }, { }, }; diff --git a/drivers/thermal/intel/intel_hfi.c b/drivers/thermal/intel/intel_hfi.c index 5b18a46a10b0..bd2fca7dc017 100644 --- a/drivers/thermal/intel/intel_hfi.c +++ b/drivers/thermal/intel/intel_hfi.c @@ -284,7 +284,7 @@ void intel_hfi_process_event(__u64 pkg_therm_status_msr_val) if (!raw_spin_trylock(&hfi_instance->event_lock)) return; - rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr); + rdmsrq(MSR_IA32_PACKAGE_THERM_STATUS, msr); hfi = msr & PACKAGE_THERM_STATUS_HFI_UPDATED; if (!hfi) { raw_spin_unlock(&hfi_instance->event_lock); @@ -356,9 +356,9 @@ static void hfi_enable(void) { u64 msr_val; - rdmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); + rdmsrq(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); msr_val |= HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT; - wrmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); + wrmsrq(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); } static void hfi_set_hw_table(struct hfi_instance *hfi_instance) @@ -368,7 +368,7 @@ static void hfi_set_hw_table(struct hfi_instance *hfi_instance) hw_table_pa = virt_to_phys(hfi_instance->hw_table); msr_val = hw_table_pa | HW_FEEDBACK_PTR_VALID_BIT; - wrmsrl(MSR_IA32_HW_FEEDBACK_PTR, msr_val); + wrmsrq(MSR_IA32_HW_FEEDBACK_PTR, msr_val); } /* Caller must hold hfi_instance_lock. */ @@ -377,9 +377,9 @@ static void hfi_disable(void) u64 msr_val; int i; - rdmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); + rdmsrq(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); msr_val &= ~HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT; - wrmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); + wrmsrq(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); /* * Wait for hardware to acknowledge the disabling of HFI. Some @@ -388,7 +388,7 @@ static void hfi_disable(void) * memory. */ for (i = 0; i < 2000; i++) { - rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); + rdmsrq(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); if (msr_val & PACKAGE_THERM_STATUS_HFI_UPDATED) break; diff --git a/drivers/thermal/intel/intel_powerclamp.c b/drivers/thermal/intel/intel_powerclamp.c index 96a24df79686..9a4cec000910 100644 --- a/drivers/thermal/intel/intel_powerclamp.c +++ b/drivers/thermal/intel/intel_powerclamp.c @@ -340,7 +340,7 @@ static bool has_pkg_state_counter(void) /* check if any one of the counter msrs exists */ while (info->msr_index) { - if (!rdmsrl_safe(info->msr_index, &val)) + if (!rdmsrq_safe(info->msr_index, &val)) return true; info++; } @@ -356,7 +356,7 @@ static u64 pkg_state_counter(void) while (info->msr_index) { if (!info->skip) { - if (!rdmsrl_safe(info->msr_index, &val)) + if (!rdmsrq_safe(info->msr_index, &val)) count += val; else info->skip = true; diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c index 9ff0ebdde0ef..f352ecafbedf 100644 --- a/drivers/thermal/intel/intel_tcc_cooling.c +++ b/drivers/thermal/intel/intel_tcc_cooling.c @@ -11,6 +11,7 @@ #include <linux/module.h> #include <linux/thermal.h> #include <asm/cpu_device_id.h> +#include <asm/msr.h> #define TCC_PROGRAMMABLE BIT(30) #define TCC_LOCKED BIT(31) @@ -81,14 +82,14 @@ static int __init tcc_cooling_init(void) if (!id) return -ENODEV; - err = rdmsrl_safe(MSR_PLATFORM_INFO, &val); + err = rdmsrq_safe(MSR_PLATFORM_INFO, &val); if (err) return err; if (!(val & TCC_PROGRAMMABLE)) return -ENODEV; - err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val); + err = rdmsrq_safe(MSR_IA32_TEMPERATURE_TARGET, &val); if (err) return err; diff --git a/drivers/thermal/intel/therm_throt.c b/drivers/thermal/intel/therm_throt.c index e69868e868eb..debc94e2dc16 100644 --- a/drivers/thermal/intel/therm_throt.c +++ b/drivers/thermal/intel/therm_throt.c @@ -273,7 +273,7 @@ void thermal_clear_package_intr_status(int level, u64 bit_mask) } msr_val &= ~bit_mask; - wrmsrl(msr, msr_val); + wrmsrq(msr, msr_val); } EXPORT_SYMBOL_GPL(thermal_clear_package_intr_status); @@ -287,7 +287,7 @@ static void get_therm_status(int level, bool *proc_hot, u8 *temp) else msr = MSR_IA32_PACKAGE_THERM_STATUS; - rdmsrl(msr, msr_val); + rdmsrq(msr, msr_val); if (msr_val & THERM_STATUS_PROCHOT_LOG) *proc_hot = true; else @@ -643,7 +643,7 @@ static void notify_thresholds(__u64 msr_val) void __weak notify_hwp_interrupt(void) { - wrmsrl_safe(MSR_HWP_STATUS, 0); + wrmsrq_safe(MSR_HWP_STATUS, 0); } /* Thermal transition interrupt handler */ @@ -654,7 +654,7 @@ void intel_thermal_interrupt(void) if (static_cpu_has(X86_FEATURE_HWP)) notify_hwp_interrupt(); - rdmsrl(MSR_IA32_THERM_STATUS, msr_val); + rdmsrq(MSR_IA32_THERM_STATUS, msr_val); /* Check for violation of core thermal thresholds*/ notify_thresholds(msr_val); @@ -669,7 +669,7 @@ void intel_thermal_interrupt(void) CORE_LEVEL); if (this_cpu_has(X86_FEATURE_PTS)) { - rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); + rdmsrq(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); /* check violations of package thermal thresholds */ notify_package_thresholds(msr_val); therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT, diff --git a/drivers/thermal/intel/x86_pkg_temp_thermal.c b/drivers/thermal/intel/x86_pkg_temp_thermal.c index 2841d14914b7..3fc679b6f11b 100644 --- a/drivers/thermal/intel/x86_pkg_temp_thermal.c +++ b/drivers/thermal/intel/x86_pkg_temp_thermal.c @@ -20,6 +20,7 @@ #include <linux/debugfs.h> #include <asm/cpu_device_id.h> +#include <asm/msr.h> #include "thermal_interrupt.h" |