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2025-12-09Merge tag 'phy-for-6.19' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "Core: - Drop Kishon as maintainer, thanks to him for helping, move to credits and add Neil to help with reviews. - Add new phy_notify_stat to notify phy from controllers during the runtime transitions and usage in samsung phy New hardware support: - Renesas RZ/G3E USB3.0 driver - NXP Support TJA1048/TJA1051 CAN phy - Rockchip support for rk3506 dsi dphy - Qualcomm Glymur QMP PCIe PHY support Updates: - PM support for rcar-gen3-usb2 driver - Samsung HDMI/eDP Transmitter Combo PHY updates - Freescale imx8mq support for alternate reference clock" * tag 'phy-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (40 commits) MAINTAINERS: phy: Add Neil Armstrong as reviewers for phy subsystem MAINTAINERS: phy: Move Kishon Vijay Abraham I to credits phy: fsl-imx8mq-usb: support alternate reference clock dt-bindings: phy: imx8mq-usb: add alternate reference clock phy: rockchip: samsung-hdptx: Prevent Inter-Pair Skew from exceeding the limits phy: rockchip: samsung-hdptx: Reduce ROPLL loop bandwidth phy: rockchip: samsung-hdptx: Fix reported clock rate in high bpc mode phy: ti: gmii-sel: Add a sanity check on the phy_id phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen5x4 PHY phy: qcom-qmp: pcs: Add v8.50 register offsets dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe PHY dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Restrict resets per each device phy: freescale: Initialize priv->lock phy: renesas: Remove unneeded semicolons phy: qcom: m31-eusb2: Update init sequence to set PHY_ENABLE phy: qcom: qmp-combo: get the USB3 & DisplayPort lanes mapping from DT dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document lanes mapping when not using in USB-C complex phy: rockchip: naneng-combphy: Fix PCIe L1ss support RK3562 phy: rockchip: naneng-combphy: Fix PCIe L1ss support RK3528 phy: renesas: rcar-gen3-usb2: Add suspend/resume support ...
2025-12-05Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds
Pull SCSI updates from James Bottomley: "Usual driver updates (ufs, lpfc, target, qla2xxx) plus assorted cleanups and fixes including the WQ_PERCPU series. The biggest core change is the new allocation of pseudo-devices which allow the sending of internal commands to a given SCSI target" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (147 commits) scsi: MAINTAINERS: Add the UFS include directory scsi: scsi_debug: Support injecting unaligned write errors scsi: qla2xxx: Fix improper freeing of purex item scsi: ufs: rockchip: Fix compile error without CONFIG_GPIOLIB scsi: ufs: rockchip: Reset controller on PRE_CHANGE of hce enable notify scsi: ufs: core: Use scsi_device_busy() scsi: ufs: core: Fix single doorbell mode support scsi: pm80xx: Add WQ_PERCPU to alloc_workqueue() users scsi: target: Add WQ_PERCPU to alloc_workqueue() users scsi: qedi: Add WQ_PERCPU to alloc_workqueue() users scsi: target: ibmvscsi: Add WQ_PERCPU to alloc_workqueue() users scsi: qedf: Add WQ_PERCPU to alloc_workqueue() users scsi: bnx2fc: Add WQ_PERCPU to alloc_workqueue() users scsi: be2iscsi: Add WQ_PERCPU to alloc_workqueue() users scsi: message: fusion: Add WQ_PERCPU to alloc_workqueue() users scsi: lpfc: WQ_PERCPU added to alloc_workqueue() users scsi: scsi_transport_fc: WQ_PERCPU added to alloc_workqueue users() scsi: scsi_dh_alua: WQ_PERCPU added to alloc_workqueue() users scsi: qla2xxx: WQ_PERCPU added to alloc_workqueue() users scsi: target: sbp: Replace use of system_unbound_wq with system_dfl_wq ...
2025-12-04Merge tag 'devicetree-for-6.19' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT bindings: - Convert lattice,ice40-fpga-mgr, apm,xgene-storm-dma, brcm,sr-thermal, amazon,al-thermal, brcm,ocotp, mt8173-mdp, Actions Owl SPS, Marvell AP80x System Controller, Marvell CP110 System Controller, cznic,moxtet, and apm,xgene-slimpro-mbox to DT schema format - Add i.MX95 fsl,irqsteer, MT8365 Mali Bifrost GPU, Anvo ANV32C81W EEPROM, and Microchip pic64gx PLIC - Add missing LGE, AMD Seattle, and APM X-Gene SoC platform compatibles - Updates to brcm,bcm2836-l1-intc, brcm,bcm2835-hvs, and bcm2711-hdmi bindings to fix warnings on BCM2712 platforms - Drop obsolete db8500-thermal.txt - Treewide clean-up of extra blank lines and inconsistent quoting - Ensure all .dtbo targets are applied to a base .dtb - Speed up dt_binding_check by skipping running validation on empty examples DT core: - Add of_machine_device_match() and of_machine_get_match_data() helpers and convert users treewide - Fix bounds checking of address properties in FDT code. Rework the code to have a single implementation of the bounds checks. - Rework of_irq_init() to ignore any implicit interrupt-parent (i.e. in a parent node) on nodes without an interrupt. This matches the spec description and fixes some RISC-V platforms. - Avoid a spurious message on overlay removal - Skip DT kunit tests on RISCV+ACPI" * tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits) dt-bindings: kbuild: Skip validating empty examples dt-bindings: interrupt-controller: brcm,bcm2836-l1-intc: Drop interrupt-controller requirement dt-bindings: display: Fix brcm,bcm2835-hvs bindings for BCM2712 dt-bindings: display: bcm2711-hdmi: Add interrupt details for BCM2712 of: Skip devicetree kunit tests when RISCV+ACPI doesn't populate root node soc: tegra: Simplify with of_machine_device_match() soc: qcom: ubwc: Simplify with of_machine_get_match_data() powercap: dtpm: Simplify with of_machine_get_match_data() platform: surface: Simplify with of_machine_get_match_data() irqchip/atmel-aic: Simplify with of_machine_get_match_data() firmware: qcom: scm: Simplify with of_machine_device_match() cpuidle: big_little: Simplify with of_machine_device_match() cpufreq: sun50i: Simplify with of_machine_device_match() cpufreq: mediatek: Simplify with of_machine_get_match_data() cpufreq: dt-platdev: Simplify with of_machine_get_match_data() of: Add wrappers to match root node with OF device ID tables dt-bindings: eeprom: at25: Add Anvo ANV32C81W of/reserved_mem: Simplify the logic of __reserved_mem_alloc_size() of/reserved_mem: Simplify the logic of fdt_scan_reserved_mem_reg_nodes() of/reserved_mem: Simplify the logic of __reserved_mem_reserve_reg() ...
2025-11-20dt-bindings: phy: imx8mq-usb: add alternate reference clockXu Yang
Beside default 24MHz clock input, there is an optional additional 100Mhz clock input 'alt' for USB PHY reference clock. Reviewed-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://patch.msgid.link/20251118071947.2504789-1-xu.yang_2@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-20dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe PHYPrudhvi Yarlagadda
The fifth PCIe instance on Glymur has a Gen5 4-lane PHY. Document it as a separate compatible. Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com> Signed-off-by: Wenbin Yao <wenbin.yao@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com> Link: https://patch.msgid.link/20251103-glymur-pcie-upstream-v6-1-18a5e0a538dc@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-20dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Restrict resets per each deviceKrzysztof Kozlowski
Bindings should be complete, thus complete the constraints for the resets by adding missing compatibles for devices with two resets and "else:" clause narrowing them for all other devices. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251017045919.34599-2-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-20dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document lanes mapping when ↵Neil Armstrong
not using in USB-C complex The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top of a combo glue to route either lanes to the 4 shared physical lanes. The routing of the lanes can be: - 2 DP + 2 USB3 - 4 DP - 2 USB3 The layout of the lanes was designed to be mapped and swapped related to the USB-C Power Delivery negociation, so it supports a finite set of mappings inherited by the USB-C Altmode layouts. Nevertheless those QMP Comby PHY can be used to drive a DisplayPort connector, DP->HDMI bridge, USB3 A Connector, etc... without an USB-C connector and no PD events. Document the data-lanes on numbered port@0 out endpoints, allowing us to document the lanes mapping to DisplayPort and/or USB3 connectors/peripherals. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20251119-topic-x1e80100-hdmi-v7-1-2bee0e66cc1b@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-20dt-bindings: phy: renesas,usb2-phy: Mark resets as required for RZ/G3SClaudiu Beznea
The reset lines are mandatory for the Renesas RZ/G3S platform and must be explicitly defined in device tree. Fixes: f3c849855114 ("dt-bindings: phy: renesas,usb2-phy: Document RZ/G3S phy bindings") Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/20251023135810.1688415-2-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-20dt-bindings: phy: rockchip-inno-dsidphy: Add compatible for rk3506Chaoyi Chen
Document a compatible string for the rk3506 dsi-dphy. Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251106020632.92-3-kernel@airkyi.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-20dt-bindings: phy: mediatek,tphy: Add support for MT7981Sjoerd Simons
Add a compatible string for Filogic 820, this chip integrates a MediaTek generic T-PHY version 2 Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Link: https://patch.msgid.link/20251115-openwrt-one-network-v4-3-48cbda2969ac@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-19Merge branch 6.18/scsi-fixes into 6.19/scsi-stagingMartin K. Petersen
Pull in fixes branch to resolve UFS merge conflict. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-11-18phy: Add Renesas RZ/G3E USB3.0 PHY driverVinod Koul
Biju <biju.das.au@gmail.com> says: This patch series aims to add Renesas RZ/G3E USB3.0 PHY driver support. This module is connected between USB3 Host and PHY module. The main functions of this module are: 1) Reset control 2) Control of PHY input pins 3) Monitoring of PHY output pins Biju Das (2): dt-bindings: phy: renesas: Document Renesas RZ/G3E USB3.0 PHY phy: renesas: Add Renesas RZ/G3E USB3.0 PHY driver Link: https://patch.msgid.link/20251029084037.108610-1-biju.das.jz@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-18dt-bindings: phy: renesas: Document Renesas RZ/G3E USB3.0 PHYBiju Das
Document Renesas RZ/G3E USB3.0 PHY. This IP is connected between USB3HOST and PHY module. The main functions of the module are as follows: - Reset control - Control of PHY input pins - Monitoring of PHY output pins Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251029084037.108610-2-biju.das.jz@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-17dt-bindings: Remove extra blank linesRob Herring (Arm)
Generally at most 1 blank line is the standard style for DT schema files. Remove the few cases with more than 1 so that the yamllint check for this can be enabled. Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc Acked-by: Georgi Djakov <djakov@kernel.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Andi Shyti <andi.shyti@kernel.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-11-17dt-bindings: Fix inconsistent quotingRob Herring (Arm)
yamllint has gained a new check which checks for inconsistent quoting (mixed " and ' quotes within a file). Fix all the cases yamllint found so we can enable the check (once the check is in a release). As single quotes are (slightly) preferred, use them throughout the modified files even if double quotes are mostly used. Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Andrew Jeffery <andrew@codeconstruct.com.au> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee@kernel.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/20251015232015.846282-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-11-12phy: phy-can-transceiver: Support TJA1048/TJA1051Vinod Koul
Peng Fan <peng.fan@nxp.com> says: TJA1048 is a Dual channel can transceiver with Sleep mode supported. TJA105{1,7} is a Single Channel can transceiver with Sleep mode supported. Link: https://patch.msgid.link/20251001-can-v7-0-fad29efc3884@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-12dt-bindings: phy: ti,tcan104x-can: Document NXP TJA105X/1048Peng Fan
The TJA1048 is a dual high-speed CAN transceiver with sleep mode supported and no EN pin. The TJA1051 is a high-speed CAN transceiver with slient mode supported, but only TJA1051T/E has EN pin. To make it simple, make enable-gpios as optional for TJA1051. The TJA1057 is a high-speed CAN transceiver with slient mode supported and no EN pin. Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://patch.msgid.link/20251001-can-v7-1-fad29efc3884@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-08scsi: dt-bindings: phy: mediatek,ufs-phy: Update maintainer information in ↵Peter Wang
mediatek,ufs-phy.yaml Replace Stanley Chu with me and Chaotian in the maintainers field, since his email address is no longer active. Signed-off-by: Peter Wang <peter.wang@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251103115808.3771214-1-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-10-26Merge tag 'usb-6.18-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB driver fixes from Greg KH: "Here are some small USB driver fixes and new device ids for 6.18-rc3. Included in here are: - new option serial driver device ids added - dt bindings fixes for numerous platforms - xhci bugfixes for many reported regressions - usbio dependency bugfix - dwc3 driver fix - raw-gadget bugfix All of these have been in linux-next this week with no reported issues" * tag 'usb-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: USB: serial: option: add Telit FN920C04 ECM compositions USB: serial: option: add Quectel RG255C tcpm: switch check for role_sw device with fw_node usb/core/quirks: Add Huawei ME906S to wakeup quirk usb: raw-gadget: do not limit transfer length USB: serial: option: add UNISOC UIS7720 xhci: dbc: enable back DbC in resume if it was enabled before suspend xhci: dbc: fix bogus 1024 byte prefix if ttyDBC read races with stall event usb: xhci-pci: Fix USB2-only root hub registration dt-bindings: usb: qcom,snps-dwc3: Fix bindings for X1E80100 usb: misc: Add x86 dependency for Intel USBIO driver dt-bindings: usb: switch: split out ports definition usb: dwc3: Don't call clk_bulk_disable_unprepare() twice dt-bindings: usb: dwc3-imx8mp: dma-range is required only for imx8mp
2025-10-13Merge branch '6.18/scsi-queue' into 6.18/scsi-fixesMartin K. Petersen
Pull in outstanding SCSI fixes for 6.18. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-10-13dt-bindings: usb: switch: split out ports definitionNeil Armstrong
The ports definition currently defined in the usb-switch.yaml fits standards devices which are either recipient of altmode muxing and orientation switching events or an element of the USB Super Speed data lanes. This doesn't necessarely fit combo PHYs like the Qualcomm USB3/DP Combo which has a different ports representation. Move the ports definition to a separate usb-switch-ports.yaml and reference it next to the usb-switch.yaml, except for the Qualcomm USB3/DP Combo PHY bindings. Reported-by: Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/all/175462129176.394940.16810637795278334342.robh@kernel.org/ Fixes: 3bad7fe22796 ("dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Reference usb-switch.yaml to allow mode-switch") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-10-06scsi: ufs: phy: dt-bindings: Add QMP UFS PHY compatible for KaanapaliJingyi Wang
Document the QMP UFS PHY compatible for Qualcomm Kaanapali to support physical layer functionality for UFS found on the SoC. Use fallback to indicate the compatibility of the QMP UFS PHY on the Kaanapali with that on the SM8750. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-10-06Merge tag 'phy-for-6.18' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "The usual bunch of device support and update to drivers. New Support - Qualcomm SM8750 QMP PCIe PHY dual lane support, PMIV0104 eusb2 repeater support, QCS8300 eDP PHY support - Renesas RZ/T2H and RZ/N2H support and updates to driver for that - TI TCAN1051 phy support - Rockchip rk3588 dphy support, RK3528 combphy support Updates: - cadence updates for calibration and polling for ready and enabling of lower resolutions, runtime pm support, - Rockchip: enable U3 otg port - Renesas USXGMII mode support - Qualcomm UFS PHY and PLL regulator load support" * tag 'phy-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (64 commits) phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant phy: rockchip: phy-rockchip-inno-csidphy: allow for different reset lines phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0 dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant dt-bindings: phy: rockchip-inno-csi-dphy: make power-domains non-required phy: cadence: cdns-dphy: Enable lower resolutions in dphy phy: renesas: r8a779f0-ether-serdes: add new step added to latest datasheet phy: renesas: r8a779f0-ether-serdes: add USXGMII mode phy: sophgo: Add USB 2.0 PHY driver for Sophgo CV18XX/SG200X dt-bindings: phy: Add Sophgo CV1800 USB phy phy: cadence: cdns-dphy: Update calibration wait time for startup state machine phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling phy: renesas: rcar-gen3-usb2: Fix ID check logic with VBUS valid dt-bindings: phy: ti,tcan104x-can: Document TI TCAN1051 phy: lynx-28g: check return value when calling lynx_28g_pll_get phy: qcom: m31-eusb2: Fix the error log while enabling clock phy: rockchip: usbdp: Remove redundant ternary operators phy: renesas: rcar-gen3-usb2: Remove redundant ternary operators phy: hisilicon: Remove redundant ternary operators phy: qcom-qmp-ufs: Add PHY and PLL regulator load ...
2025-09-10dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variantMichael Riesch
The Rockchip RK3588 variant of the CSI-2 DPHY features two reset lines. Add the variant and allow for the additional reset. While at it, fix the description of the first reset in order to avoid confusion. Signed-off-by: Michael Riesch <michael.riesch@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-3-a4f340a7f0cf@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-10dt-bindings: phy: rockchip-inno-csi-dphy: make power-domains non-requiredMichael Riesch
There are variants of the Rockchip Innosilicon CSI DPHY (e.g., the RK3568 variant) that are powered on by default as they are part of the ALIVE power domain. Remove 'power-domains' from the required properties in order to avoid false positives. Fixes: 22c8e0a69b7f ("dt-bindings: phy: add compatible for rk356x to rockchip-inno-csi-dphy") Cc: stable@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michael Riesch <michael.riesch@collabora.com> Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-2-a4f340a7f0cf@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-10dt-bindings: phy: Add Sophgo CV1800 USB phyInochi Amaoto
The USB phy of Sophgo CV18XX series SoC needs to sense a pin called "VBUS_DET" to get the right operation mode. If this pin is not connected, it only supports setting the mode manually. Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250708063038.497473-2-inochiama@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-01dt-bindings: phy: ti,tcan104x-can: Document TI TCAN1051Maud Spierings
TCAN1051-Q1 Automotive Fault Protected CAN Transceiver with CAN FD It is pretty much identical to the TCAN1042, add the compatible with fallback on the TCAN1042. Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250822-can_phy3-v1-1-73b3ba1690ee@gocontroll.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-20dt-bindings: phy: Add eDP PHY compatible for QCS8300Yongxing Mou
Add compatible string for the supported eDP PHY on QCS8300 platform. QCS8300 have the same eDP PHY with SA8775P. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com> Link: https://lore.kernel.org/r/20250730072725.1433360-1-quic_yongmou@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-20dt-bindings: phy: renesas,usb2-phy: Add RZ/T2H and RZ/N2H supportLad Prabhakar
Document the USB2 PHY controller for the Renesas RZ/T2H (r9a09g077) and RZ/N2H (r9a09g087) SoCs. These SoCs share the same PHY block, which is similar to the one on RZ/G2L but differs in clocks, resets, and register bits. To account for these differences, a new compatible string `renesas,usb2-phy-r9a09g077` is introduced. The RZ/N2H SoC uses the same PHY as RZ/T2H, so it reuses the RZ/T2H compatible string as a fallback. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250808215209.3692744-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-20dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Reference usb-switch.yaml to ↵Neil Armstrong
allow mode-switch The QMP USB3/DP Combo PHY can work in 3 modes: - DisplayPort Only - USB3 Only - USB3 + DisplayPort Combo mode In order to switch between those modes, the PHY needs to receive Type-C events, allow marking to the phy with the mode-switch property in order to allow the PHY to Type-C events. Reference usb-switch.yaml as a simpler way to allow the mode-switch property instead of duplicating the property definition. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Lenovo Thinkpad T14S Link: https://lore.kernel.org/r/20250807-topic-4ln_dp_respin-v4-1-43272d6eca92@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-19dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the SM8750 QMP PCIe ↵Krishna Chaitanya Chundru
PHY Gen3 x2 Document the QMP PCIe PHY on the SM8750 platform. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250809-pakala-v1-1-abf1c416dbaa@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: qcom,snps-eusb2-repeater: Add compatible for PMIV0104Luca Weiss
Add a dt-bindings compatible string for the Qualcomm's PMIV0104 PMIC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-3-b6eff075c097@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: qcom,snps-eusb2-repeater: Document qcom,tune-res-fsdifLuca Weiss
Document the FS Differential TX Output Resistance Tuning value found on the eUSB2 repeater on Qualcomm PMICs. The tuning values have special meanings, being different offsets of the resistance to the default value in Ohms but the exact meaning is not relevant here, as the correct tuning is determined by hardware engineers to make sure the electrical properties are as expected. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-1-b6eff075c097@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: rockchip: naneng-combphy: Add RK3528 variantYao Zi
Rockchip RK3528 ships one naneng-combphy which operates in either PCIe or USB 3 mode. Document its compatible string. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250728102947.38984-5-ziyao@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: rockchip: naneng-combphy: Add power-domains propertyYao Zi
Though isn't described in existing devicetrees, most Rockchip combphys belong to a specific power-domain of the SoC. Taking RK3588 as example, combphy 0 and combphy 2 belong to the PD_BUS domain. Document the power-domains property to allow describing the information correctly in devicetree. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250728102947.38984-4-ziyao@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-12dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindingsZiyue Zhang
The gcc_aux_clk is required by the PCIe controller but not by the PCIe PHY. In PCIe PHY, the source of aux_clk used in low-power mode should be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with gcc_phy_aux_clk. Fixes: fd2d4e4c1986 ("dt-bindings: phy: qcom,qmp: Add sa8775p QMP PCIe PHY") Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250725102231.3608298-2-ziyue.zhang@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-12dt-bindings: phy: marvell,comphy-cp110: Fix clock and child node constraintsRob Herring (Arm)
In converting marvell,comphy-cp110 to schema, the constraints for clocks on marvell,comphy-a3700 are wrong, the maximum number of child nodes are wrong, and the phy nodes may have a 'connector' child node: phy@18300 (marvell,comphy-a3700): clock-names: False schema does not allow ['xtal'] phy@120000 (marvell,comphy-cp110): 'phy@3', 'phy@4', 'phy@5' do not match any of the regexes: '^phy@[0-2]$', '^pinctrl-[0-9]+$' phy@120000 (marvell,comphy-cp110): phy@2: 'connector' does not match any of the regexes: '^pinctrl-[0-9]+$' Fixes: 50355ac70d4f ("dt-bindings: phy: Convert marvell,comphy-cp110 to DT schema") Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20250806200138.1366189-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-12dt-bindings: phy: fsl,imx8mq-usb: Drop 'db' suffix duplicating dtschemaKrzysztof Kozlowski
A common property unit suffix '-db' was added to dtschema, thus in-kernel bindings should not reference the type. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250811-dt-bindings-db-v1-2-457301523bb5@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-01Merge tag 'phy-for-6.17' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "New Support: - Qualcomm Milos Synopsys eUSB2 PHY, SM8750 QMP phy support, M31 eUSB2 PHY driver - Samsung Exynos990 usbdrd phy, Exynos7870 MIPI phy support - Renesas RZ/V2N usb2-phy support Updates: - Bulk Yaml binding conversion By Rob H (too many to be listed) - cadence: Sierra PCIe, USB PHY multilink configuration support - Qualcomm refactoring of UFS PHY reset and UFS driver support for phy calibrate API" * tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (74 commits) phy: qcom: phy-qcom-m31: Update IPQ5332 M31 USB phy initialization sequence dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schema dt-bindings: phy: Convert ti,da830-usb-phy to DT schema dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the example dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties phy: exynos-mipi-video: correct cam0 sysreg property name for exynos7870 phy: qcom: phy-qcom-snps-eusb2: Update init sequence per HPG 1.0.2 phy: qcom: phy-qcom-snps-eusb2: Add missing write from init sequence dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHY dt-bindings: usb: qcom,snps-dwc3: Add Milos compatible phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal phy: rockchip-pcie: Enable all four lanes if required dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615 phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750 phy: qcom: m31-eusb2: drop registration printk phy: qcom: m31-eusb2: fix match data santity check phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P phy: qualcomm: phy-qcom-eusb2-repeater: Don't zero-out registers dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning values phy: mediatek: tphy: Cleanup and document slew calibration ...
2025-07-24dt-bindings: mfd: Convert lpc1850-creg-clk, pc1850-dmamux and ↵Frank Li
phy-lpc18xx-usb-otg to YAML format Combine the following separate plain text based bindings to YAML: lpc1850-creg-clk.txt pc1850-dmamux.txt phy-lpc18xx-usb-otg.txt Additional changes: - remove label in example. - remove dmamux consumer in example. - remove clock consumer in example. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250602143612.943516-1-Frank.Li@nxp.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-07-22dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schemaRob Herring (Arm)
Convert the Broadcom Stingray USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20250627220126.214577-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-07-22dt-bindings: phy: Convert ti,da830-usb-phy to DT schemaRob Herring (Arm)
Convert the TI DA830 USB PHY binding to DT schema format. Add "clocks" and "clock-names" which are already in use. As they are always present, make them required as well. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: David Lechner <david@lechnology.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250627220107.214162-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-07-22dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the exampleKrzysztof Kozlowski
Examples should not have the 'status' property and 'okay' is anyway by default. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250701063636.23872-2-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-07-22dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* propertiesLiu Ying
assigned-clock* properties can be used by default now, so allow them. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250707-dt-bindings-phy-mixel-mipi-dsi-phy-allow-assign-clock-properties-v1-1-5e34b257e1ef@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-07-22dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHYLuca Weiss
Document the Synopsys eUSB2 PHY on the Milos SoC by using the SM8550 as fallback. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-eusb-phy-v3-2-6c3224085eb6@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-07-22dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for ↵Ziyue Zhang
QCS615 QCS615 pcie phy only use 5 clocks, which are aux, cfg_ahb, ref, ref_gen, pipe. So move "qcom,qcs615-qmp-gen3x1-pcie-phy" compatible from 6 clocks' list to 5 clocks' list. Fixes: 1e889f2bd837 ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS615 QMP PCIe PHY Gen3 x1") Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250703095630.669044-2-ziyue.zhang@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-26dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning valuesLuca Weiss
The reset default tuning value depends on the PMIC, so remove them from the doc since they're not accurate for all PMICs. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250617-eusb2-repeater-tuning-v2-1-ed6c484f18ee@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-26dt-bindings: phy: apm,xgene-phy: Remove trailing whitespaceGeert Uytterhoeven
Remove trailing whitespace which hurts my eyes. Fixes: 65ad0d068c426c2f ("dt-bindings: phy: Convert apm,xgene-phy to DT schema") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5b8e9b4f645bcac9d50059e513abba4db7e1aaea.1750771156.git.geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Add the M31 based eUSB2 PHY bindingsWesley Cheng
On SM8750, the M31 eUSB2 PHY is being used to support USB2. Add the binding definition for the PHY driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com> Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-2-d58de3b41d34@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add SM8750 to QMP PHYWesley Cheng
Add an entry to the compatible field for SM8750 for the QMP combo PHY. This handles the USB3 path for SM8750. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com> Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-1-d58de3b41d34@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit (git 2.34.1) at 2026-01-03 12:31:33 +0000