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path: root/arch/arm/boot/dts/aspeed
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2025-01-08ARM: dts: aspeed: yosemite4: adjust secondary flash namePatrick Williams
Meta (Facebook) has a preference for all of our secondary flash chips to be labelled "alt-bmc" for consistency of userspace tools deal with updates. Bletchley, Harma, Minerva, and Catalina all follow this convention but for some reason Yosemite4 is different. Adjust the label in the dts to match the other platforms. Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Link: https://patch.msgid.link/20250107162726.232402-1-patrick@stwcx.xyz Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-01-07ARM: dts: aspeed: system1: Use crps PSU driverNinad Palsule
The system1 uses Intel common redundant (crps185) power supplies so move to correct new crps driver. Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Link: https://patch.msgid.link/20241217173537.192331-5-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add second source RTCYang Chen
Add second source RTC on i2c bus 9. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20241212133226.342937-5-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add bmc ready led settingYang Chen
Add GPIO BMC_READY on LED and give it active value and transitory flag. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20241212133226.342937-4-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add i/o expanders on each FCBYang Chen
Add four I/O expanders on each i2c of fan control board (FCB), assign the GPIO line name to each GPIO in use, and specify the interrupt GPIO number for each FCB's i/o expander. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20241212133226.342937-3-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add i/o expanders on bus 0Yang Chen
Add three I/O expanders on i2c bus 0, assign the GPIO line name to each GPIO in use, and specify the interrupt GPIO that has been used on it and give the interrupt gpio number. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20241212133226.342937-2-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: remove interrupt of GPIOB4 form all IOEXPPotin Lai
We notice this interrupt pin always keep low, it cause BMC stuck at boot up until kernel disabling IRQ of this GPIO pin. Remove the interrupt of GPIOB4 pin from all IOEXP for now to avoid BMC get stuck. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20241121-catalina-dts-20241120-v1-2-e4212502624b@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: revise ltc4287 shunt-resistor valuePotin Lai
Fix wrong shunt-resistor settings of two ltc4287 nodes. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20241121-catalina-dts-20241120-v1-1-e4212502624b@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13arm: dts: aspeed: Blueridge and Rainer: Add VRM presence GPIOsEddie James
Add GPIO line names to the GPIO expander to describe DCM and VRM presence detection lines. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241115222721.1564735-1-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Blueridge and Fuji: Fix LED node namesEddie James
The addressing on PCA LED nodes should be in hexadecimal, not decimal. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241107151431.1045102-1-eajames@linux.ibm.com [aj: Capitalise ARM in subject] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13arm: dts: aspeed: Everest and Fuji: Add VRM presence gpio expanderEddie James
Add the gpio expander that provides the VRM presence detection pins. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241106193303.748824-1-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: sbp1: IBM sbp1 BMC boardPatrick Rudolph
Add a device tree for IBM sbp1 BMC board which is based on AST2600 SOC. sbp1 baseboard has: - support for up to four Sapphire Rapids sockets having 16 DIMMS each. - 240 core/480 threads at maximum - 32x CPU PCIe slots - 2x M.2 PCH PCIe slots - Dual 200Gbit/s NIC - SPI TPM Added the following: - Indication LEDs - I2C mux & GPIO controller, pin assignments, - Thermister, - Voltage regulator - EEPROM/VPD Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com> Link: https://patch.msgid.link/20241104092220.2268805-2-naresh.solanki@9elements.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Add device tree for Ampere's Mt. Jefferson BMCChanh Nguyen
The Mt. Jefferson BMC is an ASPEED AST2600-based BMC for the Mt. Jefferson hardware reference platform with AmpereOne(TM)M processor. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://patch.msgid.link/20241021083702.9734-3-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for ADC monitor on Spider BoardRicky CX Wu
Add I2C mux for ADC monitors on Spider Board. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-10-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode on Fan BoardsRicky CX Wu
Revise adc128d818 adc mode on Fan Boards according to schematic. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-9-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Change the address of Fan IC on fan boardsRicky CX Wu
Change the address of Fan IC: Max31790 on fan boards according to schematic. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-8-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise address of i2c-mux for two fan boardsRicky CX Wu
Change the address of the I2C mux for two fan boards to 0x74 according to schematic. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-7-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: correct the compatible string for max31790Ricky CX Wu
Fix the compatible string for max31790 to match the binding document. Fixes: 2b8d94f4b4a4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-6-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add required properties for IOE on fan boardsRicky CX Wu
Add the required properties for IO expander on fan boards. Fixes: 2b8d94f4b4a4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-5-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for CPLD IOE on Spider BoardRicky CX Wu
Add I2C mux for CPLD IOE on Spider Board. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-4-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for four NICsRicky CX Wu
Add i2c-mux on Spider board for four NICs and add the temperature sensor and EEPROM for the NICs. Also remove the mctp-controller property on I2C bus 15 because we need to add the property on the I2C mux to each NIC so that the MCTP driver will ensure that each port is configured properly before communicating with the NICs. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-3-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: add i2c-mux for all Server Board slotsRicky CX Wu
Add i2c mux to 8 slots of server board and add the io expanders and eeprom for the slots. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-2-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Remove IO expanders on I2C bus 13Ricky CX Wu
Remove IO expanders on I2C bus 13 according to schematic change. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241001083021.3462426-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Add GPIO line namesNinad Palsule
Add following GPIO line names so that userspace can control them - PCH related GPIOs - FPGA related GPIOs Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-4-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Enable serial gpio0Ninad Palsule
Enable serial GPIO0. Set number of GPIO lines to 128 and bus frequency to 1MHz. Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-3-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Bump up i2c busses freqNinad Palsule
Bump up i2c8 and i2c15 bus frequency so that PCIe slot and FPGA runs faster Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-2-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: correct the compatible string of adm1272Ricky CX Wu
Remove the space in the compatible string of adm1272 to match the pattern of compatible. Fixes: 2b8d94f4b4a4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Fixes: 2b8d94f4b4a4765d ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://patch.msgid.link/20240927085213.331127-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for Management BoardRicky CX Wu
Add I2C mux for Management Board to separate the I2C bus 35 for updating CPLD firmware and I2C bus 34 for the other devices. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240926033534.4174707-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: update NIC1 fru addressPotin Lai
Update NIC1 FRU EEPROM address to 0x52 based on EVT changes. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-3-a861daeba059@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: enable mac2Potin Lai
Enable mac2 in advance for DVT HW schematic. - EVT system: - eth0 (mac2): no NCSI - eth1 (mac3): with NCSI - DVT system: - eth0 (mac2): with NCSI - eth1 (mac3): with NCSI Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-2-a861daeba059@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: move hdd board i2c mux bus to i2c5Potin Lai
Due to EVT hardware changes, move HDD board i2c mux bus from i2c30 to i2c5. Signed-off-by: Potin Lai <potin.lai@quantatw.com> Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-1-a861daeba059@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: revise flash layout to 128MBRicky CX Wu
Revise flash layout to 128MB since we are using 1GB flash memory in our project. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240924094430.272074-3-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise quad mode to dual modeRicky CX Wu
Revise quad mode to dual mode to keep the write protect feature for the SPI flash because the WP pin is the same pin with IO2 pin in quad mode. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240924094430.272074-2-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add fru device for other bladesYang Chen
The Minerva platform has 16 compute blades and 6 network blades, each with an EEPROM that can be operated by the CMM. This commit adds support for each FRU. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20240924140215.2484170-4-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: change the i2c mux number for FCBsYang Chen
Change the i2c mux channel to match the correct fan board location. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20240924140215.2484170-3-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: Revise the SGPIO line nameYang Chen
Modify the SGPIO line names sent from the CMM CPLD in the DVT version and map the blade and FCB numbers to match the silkscreen labels on the rack as follows: 1. Change the compute blade numbering from 0-15 to 1-16. 2. Change the network blade numbering from 0-5 to 1-6. 3. Update the FCB numbering from TOP0/1, MID0/1, and BOT0/1 to FCB1-6. 4. Revise the SGPIO line name for DVT changed. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20240924140215.2484170-2-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Enable spi-gpio setting for TPMRicky CX Wu
Enable spi-gpio setting for TPM device in yosemite4. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240920080227.711691-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode on Spider BoardRicky CX Wu
Revise adc128d818 adc mode on Spider Board according to schematic. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://patch.msgid.link/20240920085007.1076174-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: add i2c-mux-idle-disconnect to all muxPotin Lai
Add the `i2c-mux-idle-disconnect` property to all i2c-mux nodes to ensure proper behavior when switching between multiple I2C buses. This avoids potential confusion caused by device addresses appearing on multiple buses when they are not actively selected. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20240920-catalina-i2c-mux-fix-2-v1-1-66cce7c54188@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add gpio pca9506 for CPLD IOERicky CX Wu
We use CPLD to emulate gpio pca9506 I/O expander on each server boards. Therefore, add pca9506 to probe driver for the CPLD I/O expander. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240910054751.2943217-3-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise to use adm1281 on Medusa boardRicky CX Wu
Revise to use adm1281 for HSC according to the hardware design change. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240910054751.2943217-2-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Enable PECI and LPC snoop for IBM System1Manojkiran Eda
This patch enables the PECI interface and configures the LPC Snoop for ports 0x80 and 0x81 in the ASPEED BMC for IBM System1. Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com> Link: https://patch.msgid.link/20240918-dts-aspeed-system1-peci-snoop-v2-1-2d4d17403670@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555Ricky CX Wu
Enable interrupt setting and add GPIO line name for pca9555 for the I/O expanders on Medusa board. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240918101742.1346788-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Fix Rainier and Blueridge GPIO LED namesEddie James
Blueridge LED names to include the "led-" prefix as is proper. Rainier should match for ease of application design. In addition, the gpio line name ought to match. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20240917162100.1386130-1-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: mtmitchell: Add gpio line names for io expandersChanh Nguyen
Add below gpio line names to io expanders for more platform features. - ext-vref-sel - presence-hdd-bp5-n - presence-hdd-bp6-n - bmc-ocp0-en-n - bmc-ocp1-en-n - bmc-riser-en-n - gpi0, gpi1 Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://patch.msgid.link/20240905063521.319416-3-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: mtmitchell: Add I2C FAN controllersChanh Nguyen
Add the MAX31790 nodes as i2c fan controllers. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://patch.msgid.link/20240905063521.319416-2-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Harma: revise sgpio line namePeter Yin
power-card-enable power-fault-n power-hsc-good power-chassis-good asic0-card-type-detection0-n asic0-card-type-detection1-n asic0-card-type-detection2-n presence-cmm uart-switch-button uart-switch-lsb uart-switch-msb reset-control-cmos-clear Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20240909080459.3457853-3-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Harma: add rtc devicePeter Yin
Add "nxp,pcf8563" device and the slave address is 0x51. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20240909080459.3457853-2-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Enable adc15Ricky CX Wu
Enable Yosemite4 adc15 config for monitoring P3V_BAT_SCALED. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240910022236.1564291-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Enable watchdog2Ricky CX Wu
Enable watchdog2 setting for yosemite4 system. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://patch.msgid.link/20240910080951.3568594-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
generated by cgit (git 2.34.1) at 2025-07-18 01:19:33 +0000