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2025-04-05treewide: Switch/rename to timer_delete[_sync]()Thomas Gleixner
timer_delete[_sync]() replaces del_timer[_sync](). Convert the whole tree over and remove the historical wrapper inlines. Conversion was done with coccinelle plus manual fixups where necessary. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
2025-04-01Merge tag 'dmaengine-6.15-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "The dmaengine subsystem updates for this cycle consist of a new driver (Microchip) along with couple of yaml binding conversions, core api updates and bunch of driver updates etc. New HW support: - Microchip sama7d65 dma controller - Yaml conversion of atmel dma binding and Freescale Elo DMA Controller binding Core: - Remove device_prep_dma_imm_data() API as users are removed - Reduce scope of some less frequently used DMA request channel APIs with aim to cleanup these in future Updates: - Drop Fenghua Yu from idxd maintainers, as he changed jobs - AMD ptdma support for multiqueue and ae4dma deprecated PCI IDs removal" * tag 'dmaengine-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (29 commits) dmaengine: ptdma: Utilize the AE4DMA engine's multi-queue functionality dmaengine: ae4dma: Use the MSI count and its corresponding IRQ number dmaengine: ae4dma: Remove deprecated PCI IDs dmaengine: Remove device_prep_dma_imm_data from struct dma_device dmaengine: ti: edma: support sw triggered chans in of_edma_xlate() dmaengine: ti: k3-udma: Enable second resource range for BCDMA and PKTDMA dmaengine: fsl-edma: free irq correctly in remove path dmaengine: fsl-edma: cleanup chan after dma_async_device_unregister dt-bindings: dma: snps,dw-axi-dmac: Allow devices to be marked as noncoherent dmaengine: dmatest: Fix dmatest waiting less when interrupted dt-bindings: dma: Convert fsl,elo*-dma to YAML dt-bindings: dma: fsl-mxs-dma: Add compatible string for i.MX8 chips dmaengine: Fix typo in comment dmaengine: ti: k3-udma-glue: Drop skip_fdq argument from k3_udma_glue_reset_rx_chn dmaengine: bcm2835-dma: fix warning when CONFIG_PM=n dt-bindings: dma: fsl,edma: Add i.MX94 support dt-bindings: dma: atmel: add microchip,sama7d65-dma dmaengine: img-mdc: remove incorrect of_match_ptr annotation dmaengine: idxd: Delete unnecessary NULL check dmaengine: pxa: Enable compile test ...
2025-03-11dmaengine: ptdma: Utilize the AE4DMA engine's multi-queue functionalityBasavaraj Natikar
As AE4DMA offers multi-channel functionality compared to PTDMA’s single queue, utilize multi-queue, which supports higher speeds than PTDMA, to achieve higher performance using the AE4DMA workqueue based mechanism. Fixes: 69a47b16a51b ("dmaengine: ptdma: Extend ptdma to support multi-channel and version") Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20250203162511.911946-4-Basavaraj.Natikar@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-03-11dmaengine: ae4dma: Use the MSI count and its corresponding IRQ numberBasavaraj Natikar
Instead of using the defined maximum hardware queue, which can lead to incorrect values if the counts mismatch, use the exact supported MSI count and its corresponding IRQ number. Fixes: 90a30e268d9b ("dmaengine: ae4dma: Add AMD ae4dma controller driver") Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20250203162511.911946-3-Basavaraj.Natikar@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-03-11dmaengine: ae4dma: Remove deprecated PCI IDsBasavaraj Natikar
Two previously used PCI IDs are deprecated and should not be used for AE4DMA. Hence, remove as they are unsupported for AE4DMA. Fixes: 90a30e268d9b ("dmaengine: ae4dma: Add AMD ae4dma controller driver") Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20250203162511.911946-2-Basavaraj.Natikar@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-03-11dmaengine: ti: edma: support sw triggered chans in of_edma_xlate()Matthew Majewski
The .of_edma_xlate() function always sets the hw_triggered flag to true. This causes sw triggered channels consumed via the device-tree to not function properly, as the driver incorrectly assumes they are hw triggered. Modify the xlate() function to correctly set the hw_triggered flag to false for channels reserved for memcpy operation (ie, sw triggered). Signed-off-by: Matthew Majewski <mattwmajewski@gmail.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://lore.kernel.org/r/20250216214741.207538-1-mattwmajewski@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-03-11dmaengine: ti: k3-udma: Enable second resource range for BCDMA and PKTDMASiddharth Vadapalli
The SoC DMA resources for UDMA, BCDMA and PKTDMA can be described via a combination of up to two resource ranges. The first resource range handles the default partitioning wherein all resources belonging to that range are allocated to a single entity and form a continuous range. For use-cases where the resources are shared across multiple entities and require to be described via discontinuous ranges, a second resource range is required. Currently, udma_setup_resources() supports handling resources that belong to the second range. Extend bcdma_setup_resources() and pktdma_setup_resources() to support the same. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://lore.kernel.org/r/20250205121805.316792-1-s-vadapalli@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-03-11dmaengine: fsl-edma: free irq correctly in remove pathPeng Fan
Add fsl_edma->txirq/errirq check to avoid below warning because no errirq at i.MX9 platform. Otherwise there will be kernel dump: WARNING: CPU: 0 PID: 11 at kernel/irq/devres.c:144 devm_free_irq+0x74/0x80 Modules linked in: CPU: 0 UID: 0 PID: 11 Comm: kworker/u8:0 Not tainted 6.12.0-rc7#18 Hardware name: NXP i.MX93 11X11 EVK board (DT) Workqueue: events_unbound deferred_probe_work_func pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : devm_free_irq+0x74/0x80 lr : devm_free_irq+0x48/0x80 Call trace: devm_free_irq+0x74/0x80 (P) devm_free_irq+0x48/0x80 (L) fsl_edma_remove+0xc4/0xc8 platform_remove+0x28/0x44 device_remove+0x4c/0x80 Fixes: 44eb827264de ("dmaengine: fsl-edma: request per-channel IRQ only when channel is allocated") Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20250228071720.3780479-2-peng.fan@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-03-11dmaengine: fsl-edma: cleanup chan after dma_async_device_unregisterPeng Fan
There is kernel dump when do module test: sysfs: cannot create duplicate filename /devices/platform/soc@0/44000000.bus/44000000.dma-controller/dma/dma0chan0 __dma_async_device_channel_register+0x128/0x19c dma_async_device_register+0x150/0x454 fsl_edma_probe+0x6cc/0x8a0 platform_probe+0x68/0xc8 fsl_edma_cleanup_vchan will unlink vchan.chan.device_node, while dma_async_device_unregister needs the link to do __dma_async_device_channel_unregister. So need move fsl_edma_cleanup_vchan after dma_async_device_unregister to make sure channel could be freed. So clean up chan after dma_async_device_unregister to address this. Fixes: 6f93b93b2a1b ("dmaengine: fsl-edma: kill the tasklets upon exit") Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20250228071720.3780479-1-peng.fan@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-03-11dmaengine: dmatest: Fix dmatest waiting less when interruptedVinicius Costa Gomes
Change the "wait for operation finish" logic to take interrupts into account. When using dmatest with idxd DMA engine, it's possible that during longer tests, the interrupt notifying the finish of an operation happens during wait_event_freezable_timeout(), which causes dmatest to cleanup all the resources, some of which might still be in use. This fix ensures that the wait logic correctly handles interrupts, preventing premature cleanup of resources. Reported-by: kernel test robot <oliver.sang@intel.com> Closes: https://lore.kernel.org/oe-lkp/202502171134.8c403348-lkp@intel.com Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20250305230007.590178-1-vinicius.gomes@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-03-02Merge tag 'dmaengine-fix-6.14' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine fixes from Vinod Koul: - tegra210 div_u64 divison and max page fixes - revert Qualcomm unavailable register workaround which is causing regression, fixes have been proposed but still gaps are present so revert this for now * tag 'dmaengine-fix-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: dmaengine: Revert "dmaengine: qcom: bam_dma: Avoid writing unavailable register" dmaengine: tegra210-adma: check for adma max page dmaengine: tegra210-adma: Use div_u64 for 64 bit division
2025-02-27dmaengine: Fix typo in commentThorsten Blum
s/consumer/consume/ Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Link: https://lore.kernel.org/r/20250219105419.2025-2-thorsten.blum@linux.dev Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-27dmaengine: Revert "dmaengine: qcom: bam_dma: Avoid writing unavailable register"Caleb Connolly
This commit causes a hard crash on sdm845 and likely other platforms. Revert it until a proper fix is found. This reverts commit 57a7138d0627: ("dmaengine: qcom: bam_dma: Avoid writing unavailable register") Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Fixes: 57a7138d0627 ("dmaengine: qcom: bam_dma: Avoid writing unavailable register") Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-DB845c Tested-by: David Heidelberg <david@ixit.cz> Link: https://lore.kernel.org/r/20250208223112.142567-1-caleb.connolly@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-27dmaengine: ti: k3-udma-glue: Drop skip_fdq argument from ↵Roger Quadros
k3_udma_glue_reset_rx_chn The user of k3_udma_glue_reset_rx_chn() e.g. ti_am65_cpsw_nuss can run on multiple platforms having different DMA architectures. On some platforms there can be one FDQ for all flows in the RX channel while for others there is a separate FDQ for each flow in the RX channel. So far we have been relying on the skip_fdq argument of k3_udma_glue_reset_rx_chn(). Instead of relying on the user to provide this information, infer it based on DMA architecture during k3_udma_glue_request_rx_chn() and save it in an internal flag 'single_fdq'. Use that flag at k3_udma_glue_reset_rx_chn() to deicide if the FDQ needs to be cleared for every flow or just for flow 0. Fixes the below issue on ti_am65_cpsw_nuss driver on AM62-SK. > ip link set eth1 down > ip link set eth0 down > ethtool -L eth0 rx 8 > ip link set eth0 up > modprobe -r ti_am65_cpsw_nuss [ 103.045726] ------------[ cut here ]------------ [ 103.050505] k3_knav_desc_pool size 512000 != avail 64000 [ 103.050703] WARNING: CPU: 1 PID: 450 at drivers/net/ethernet/ti/k3-cppi-desc-pool.c:33 k3_cppi_desc_pool_destroy+0xa0/0xa8 [k3_cppi_desc_pool] [ 103.068810] Modules linked in: ti_am65_cpsw_nuss(-) k3_cppi_desc_pool snd_soc_hdmi_codec crct10dif_ce snd_soc_simple_card snd_soc_simple_card_utils display_connector rtc_ti_k3 k3_j72xx_bandgap tidss drm_client_lib snd_soc_davinci_mcas p drm_dma_helper tps6598x phylink snd_soc_ti_udma rti_wdt drm_display_helper snd_soc_tlv320aic3x_i2c typec at24 phy_gmii_sel snd_soc_ti_edma snd_soc_tlv320aic3x sii902x snd_soc_ti_sdma sa2ul omap_mailbox drm_kms_helper authenc cfg80211 r fkill fuse drm drm_panel_orientation_quirks backlight ip_tables x_tables ipv6 [last unloaded: k3_cppi_desc_pool] [ 103.119950] CPU: 1 UID: 0 PID: 450 Comm: modprobe Not tainted 6.13.0-rc7-00001-g9c5e3435fa66 #1011 [ 103.119968] Hardware name: Texas Instruments AM625 SK (DT) [ 103.119974] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 103.119983] pc : k3_cppi_desc_pool_destroy+0xa0/0xa8 [k3_cppi_desc_pool] [ 103.148007] lr : k3_cppi_desc_pool_destroy+0xa0/0xa8 [k3_cppi_desc_pool] [ 103.154709] sp : ffff8000826ebbc0 [ 103.158015] x29: ffff8000826ebbc0 x28: ffff0000090b6300 x27: 0000000000000000 [ 103.165145] x26: 0000000000000000 x25: 0000000000000000 x24: ffff0000019df6b0 [ 103.172271] x23: ffff0000019df6b8 x22: ffff0000019df410 x21: ffff8000826ebc88 [ 103.179397] x20: 000000000007d000 x19: ffff00000a3b3000 x18: 0000000000000000 [ 103.186522] x17: 0000000000000000 x16: 0000000000000000 x15: 000001e8c35e1cde [ 103.193647] x14: 0000000000000396 x13: 000000000000035c x12: 0000000000000000 [ 103.200772] x11: 000000000000003a x10: 00000000000009c0 x9 : ffff8000826eba20 [ 103.207897] x8 : ffff0000090b6d20 x7 : ffff00007728c180 x6 : ffff00007728c100 [ 103.215022] x5 : 0000000000000001 x4 : ffff000000508a50 x3 : ffff7ffff6146000 [ 103.222147] x2 : 0000000000000000 x1 : e300b4173ee6b200 x0 : 0000000000000000 [ 103.229274] Call trace: [ 103.231714] k3_cppi_desc_pool_destroy+0xa0/0xa8 [k3_cppi_desc_pool] (P) [ 103.238408] am65_cpsw_nuss_free_rx_chns+0x28/0x4c [ti_am65_cpsw_nuss] [ 103.244942] devm_action_release+0x14/0x20 [ 103.249040] release_nodes+0x3c/0x68 [ 103.252610] devres_release_all+0x8c/0xdc [ 103.256614] device_unbind_cleanup+0x18/0x60 [ 103.260876] device_release_driver_internal+0xf8/0x178 [ 103.266004] driver_detach+0x50/0x9c [ 103.269571] bus_remove_driver+0x6c/0xbc [ 103.273485] driver_unregister+0x30/0x60 [ 103.277401] platform_driver_unregister+0x14/0x20 [ 103.282096] am65_cpsw_nuss_driver_exit+0x18/0xff4 [ti_am65_cpsw_nuss] [ 103.288620] __arm64_sys_delete_module+0x17c/0x25c [ 103.293404] invoke_syscall+0x44/0x100 [ 103.297149] el0_svc_common.constprop.0+0xc0/0xe0 [ 103.301845] do_el0_svc+0x1c/0x28 [ 103.305155] el0_svc+0x28/0x98 [ 103.308207] el0t_64_sync_handler+0xc8/0xcc [ 103.312384] el0t_64_sync+0x198/0x19c [ 103.316040] ---[ end trace 0000000000000000 ]--- Signed-off-by: Roger Quadros <rogerq@kernel.org> Acked-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://lore.kernel.org/r/20250224-k3-udma-glue-single-fdq-v2-1-cbe7621f2507@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-27dmaengine: bcm2835-dma: fix warning when CONFIG_PM=nStefan Wahren
The old SET_LATE_SYSTEM_SLEEP_PM_OPS macro cause a build warning when CONFIG_PM is disabled: warning: 'bcm2835_dma_suspend_late' defined but not used [-Wunused-function] Change this to the modern replacement. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202501071533.yrFb156H-lkp@intel.com/ Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20250222095028.48818-1-wahrenst@gmx.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-27dmaengine: img-mdc: remove incorrect of_match_ptr annotationArnd Bergmann
Building with W=1 shows a warning about of_ftpm_tee_ids being unused when CONFIG_OF is disabled: drivers/dma/img-mdc-dma.c:863:34: error: unused variable 'mdc_dma_of_match' [-Werror,-Wunused-const-variable] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20250225163315.4168033-1-arnd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-15tegra210-adma: fix 32-bit x86 buildLinus Torvalds
The Tegra210 Audio DMA controller driver did a plain divide: page_no = (res_page->start - res_base->start) / cdata->ch_base_offset; which causes problems on 32-bit x86 configurations that have 64-bit resource sizes: x86_64-linux-ld: drivers/dma/tegra210-adma.o: in function `tegra_adma_probe': tegra210-adma.c:(.text+0x1322): undefined reference to `__udivdi3' because gcc doesn't generate the trivial code for a 64-by-32 divide, turning it into a function call to do a full 64-by-64 divide. And the kernel intentionally doesn't provide that helper function, because 99% of the time all you want is the narrower version. Of course, tegra210 is a 64-bit architecture and the 32-bit x86 build is purely for build testing, so this really is just about build coverage failure. But build coverage is good. Side note: div_u64() would be suboptimal if you actually have a 32-bit resource_t, so our "helper" for divides are admittedly making it harder than it should be to generate good code for all the possible cases. At some point, I'll consider 32-bit x86 so entirely legacy that I can't find it in myself to care any more, and we'll just add the __udivdi3 library function. But for now, the right thing to do is to use "div_u64()" to show that you know that you are doing the simpler divide with a 32-bit number. And the build error enforces that. While fixing the build issue, also check for division-by-zero, and for overflow. Which hopefully cannot happen on real production hardware, but the value of 'ch_base_offset' can definitely be zero in other places. Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2025-02-10dmaengine: idxd: Delete unnecessary NULL checkDan Carpenter
The "saved_evl" pointer is a offset into the middle of a non-NULL struct. It can't be NULL and the check is slightly confusing. Delete the check. Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Fenghua Yu <fenghua.yu@intel.com> Link: https://lore.kernel.org/r/ec38214e-0bbb-4c5a-94ff-b2b2d4c3f245@stanley.mountain Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: pxa: Enable compile testKrzysztof Kozlowski
The PXA_DMA driver does not include any asm/mach headers, so it can be compile tested for build coverage. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250114191316.857154-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: Use str_enable_disable-like helpersKrzysztof Kozlowski
Replace ternary (condition ? "enable" : "disable") syntax with helpers from string_choices.h because: 1. Simple function call with one argument is easier to read. Ternary operator has three arguments and with wrapping might lead to quite long code. 2. Is slightly shorter thus also easier to read. 3. It brings uniformity in the text - same string. 4. Allows deduping by the linker, which results in a smaller binary file. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> #dw-edma Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20250114191021.854080-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: tegra210-adma: check for adma max pageMohan Kumar D
Have additional check for max channel page during the probe to cover if any offset overshoot happens due to wrong DT configuration. Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") Cc: stable@vger.kernel.org Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20250210135413.2504272-3-mkumard@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: tegra210-adma: Use div_u64 for 64 bit divisionMohan Kumar D
The ADMA base and page address are represented using a 64-bit variable. To accurately derive the exact ADMA page number provided from the DT properties, use the div_u64() to divide the address difference between adma page and base address by the page offset. This change fixes the below error "ERROR: modpost: "__udivdi3" [drivers/dma/tegra210-adma.ko] undefined! ld: drivers/dma/tegra210-adma.o: in function `tegra_adma_probe': tegra210-adma.c:(.text+0x12cf): undefined reference to `__udivdi3'" Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") Cc: stable@vger.kernel.org Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202412250204.GCQhdKe3-lkp@intel.com/ Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20250210135413.2504272-2-mkumard@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: fsl-edma: Add missing newlines to log messagesStefan Wahren
Not all log messages have a newline at the end. So fix it. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250205091455.4593-1-wahrenst@gmx.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: dw: Switch to LATE_SIMPLE_DEV_PM_OPS()Andy Shevchenko
SET_LATE_SYSTEM_SLEEP_PM_OPS is deprecated, replace it with LATE_SYSTEM_SLEEP_PM_OPS() and use pm_sleep_ptr() for setting the driver's pm routines. We can now remove the ifdeffery in the suspend and resume functions. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20250205150701.893083-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: Unify checks in dma_request_chan()Andy Shevchenko
Use dev_fwnode() to simplify the check logic for Device Tree and ACPI in dma_request_chan(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20250205145757.889247-5-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: Add a comment on why it's okay when kasprintf() failsAndy Shevchenko
Add a comment in dma_request_chan() to clarify kasprintf() missing return value check and it is correct functionality. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20250205145757.889247-4-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-02-10dmaengine: Replace dma_request_slave_channel() by dma_request_chan()Andy Shevchenko
Replace dma_request_slave_channel() by dma_request_chan() as suggested since the former is deprecated. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20250205145757.889247-2-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-01-29Merge tag 'dmaengine-6.14-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "A bunch of new device support and updates to few drivers, biggest of them amd ones. New support: - TI J722S CSI BCDMA controller support - Intel idxd Panther Lake family platforms - Allwinner F1C100s suniv DMA - Qualcomm QCS615, QCS8300, SM8750, SA8775P GPI dma controller support - AMD ae4dma controller support and reorganisation of amd driver Updates: - Channel page support for Nvidia Tegra210 adma driver - Freescale support for S32G based platforms - Yamilfy atmel dma bindings" * tag 'dmaengine-6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (45 commits) dmaengine: idxd: Enable Function Level Reset (FLR) for halt dmaengine: idxd: Refactor halt handler dmaengine: idxd: Add idxd_device_config_save() and idxd_device_config_restore() helpers dmaengine: idxd: Binding and unbinding IDXD device and driver dmaengine: idxd: Add idxd_pci_probe_alloc() helper dt-bindings: dma: atmel: Convert to json schema dt-bindings: dma: st-stm32-dmamux: Add description for dma-cell values dmaengine: qcom: gpi: Add GPI immediate DMA support for SPI protocol dt-bindings: dma: adi,axi-dmac: deprecate adi,channels node dt-bindings: dma: adi,axi-dmac: convert to yaml schema dmaengine: mv_xor: switch to for_each_child_of_node_scoped() dmaengine: bcm2835-dma: Prevent suspend if DMA channel is busy dmaengine: tegra210-adma: Support channel page dt-bindings: dma: Support channel page to nvidia,tegra210-adma dmaengine: ti: k3-udma: Add support for J722S CSI BCDMA dt-bindings: dma: ti: k3-bcdma: Add J722S CSI BCDMA dmaengine: ti: edma: fix OF node reference leaks in edma_driver dmaengine: ti: edma: make the loop condition simpler in edma_probe() dmaengine: fsl-edma: read/write multiple registers in cyclic transactions dmaengine: fsl-edma: add support for S32G based platforms ...
2025-01-21Merge tag 'x86_cpu_for_v6.14_rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 cpuid updates from Borislav Petkov: - Remove the less generic CPU matching infra around struct x86_cpu_desc and use the generic struct x86_cpu_id thing - Remove magic naked numbers for CPUID functions and use proper defines of the prefix CPUID_LEAF_*. Consolidate some of the crazy use around the tree - Smaller cleanups and improvements * tag 'x86_cpu_for_v6.14_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Make all all CPUID leaf names consistent x86/fpu: Remove unnecessary CPUID level check x86/fpu: Move CPUID leaf definitions to common code x86/tsc: Remove CPUID "frequency" leaf magic numbers. x86/tsc: Move away from TSC leaf magic numbers x86/cpu: Move TSC CPUID leaf definition x86/cpu: Refresh DCA leaf reading code x86/cpu: Remove unnecessary MwAIT leaf checks x86/cpu: Use MWAIT leaf definition x86/cpu: Move MWAIT leaf definition to common header x86/cpu: Remove 'x86_cpu_desc' infrastructure x86/cpu: Move AMD erratum 1386 table over to 'x86_cpu_id' x86/cpu: Replace PEBS use of 'x86_cpu_desc' use with 'x86_cpu_id' x86/cpu: Expose only stepping min/max interface x86/cpu: Introduce new microcode matching helper x86/cpufeature: Document cpu_feature_enabled() as the default to use x86/paravirt: Remove the WBINVD callback x86/cpufeatures: Free up unused feature bits
2024-12-26Merge tag 'dmaengine-fix-6.13' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine fixes from Vinod Koul: "Bunch of minor driver fixes for drivers in this cycle: - Kernel doc warning documentation fixes - apple driver fix for register access - amd driver dropping private dma_ops - freescale cleanup path fix - refcount fix for mv_xor driver - null pointer deref fix for at_xdmac driver - GENMASK to GENMASK_ULL fix for loongson2 apb driver - Tegra driver fix for correcting dma status" * tag 'dmaengine-fix-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: dmaengine: tegra: Return correct DMA status when paused dmaengine: mv_xor: fix child node refcount handling in early exit dmaengine: fsl-edma: implement the cleanup path of fsl_edma3_attach_pd() dmaengine: amd: qdma: Remove using the private get and set dma_ops APIs dmaengine: apple-admac: Avoid accessing registers in probe linux/dmaengine.h: fix a few kernel-doc warnings dmaengine: loongson2-apb: Change GENMASK to GENMASK_ULL dmaengine: dw: Select only supported masters for ACPI devices dmaengine: at_xdmac: avoid null_prt_deref in at_xdmac_prep_dma_memset
2024-12-24dmaengine: idxd: Enable Function Level Reset (FLR) for haltFenghua Yu
When DSA/IAA device hits a fatal error, the device enters a halt state. The driver can reset the device depending on Reset Type required by hardware to recover the device. Supported Reset Types are: 0: Reset Device command 1: Function Level Reset (FLR) 2: Warm reset 3: Cold reset Currently, the driver only supports Reset Type 0. This patch adds support for FLR recovery Type 1. Before issuing a PCIe FLR command, IDXD device and WQ states are saved. After the FLR command execution, the device is recovered to its previous states, allowing the user can continue using the device. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20241122233028.2762809-6-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: idxd: Refactor halt handlerFenghua Yu
Define a halt handling helper idxd_halt(). Refactor the halt interrupt handler to call the helper. This will simplify the Function Level Reset (FLR) code. No functional change. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20241122233028.2762809-5-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: idxd: Add idxd_device_config_save() and ↵Fenghua Yu
idxd_device_config_restore() helpers Add the helpers to save and restore IDXD device configurations. These helpers will be called during Function Level Reset (FLR) processing. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20241122233028.2762809-4-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: idxd: Binding and unbinding IDXD device and driverFenghua Yu
Add idxd_bind() and idxd_unbind() helpers to bind and unbind the IDXD device and driver. These helpers will be called during Function Level Reset (FLR) processing. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20241122233028.2762809-3-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: idxd: Add idxd_pci_probe_alloc() helperFenghua Yu
Add the idxd_pci_probe_alloc() helper to probe IDXD PCI device with or without allocating and setting idxd software values. The idxd_pci_probe() function is refactored to call this helper and always probe the IDXD device with allocating and setting the software values. This helper will be called later in the Function Level Reset (FLR) process without modifying the idxd software data. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20241122233028.2762809-2-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: qcom: gpi: Add GPI immediate DMA support for SPI protocolJyothi Kumar Seerapu
The DMA TRE(Transfer ring element) buffer contains the DMA buffer address. Accessing data from this address can cause significant delays in SPI transfers, which can be mitigated to some extent by utilizing immediate DMA support. QCOM GPI DMA hardware supports an immediate DMA feature for data up to 8 bytes, storing the data directly in the DMA TRE buffer instead of the DMA buffer address. This enhancement enables faster SPI data transfers. This optimization reduces the average transfer time from 25 us to 16 us for a single SPI transfer of 8 bytes length, with a clock frequency of 50 MHz. Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20241209075033.16860-1-quic_jseerapu@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: tegra: Return correct DMA status when pausedAkhil R
Currently, the driver does not return the correct DMA status when a DMA pause is issued by the client drivers. This causes GPCDMA users to assume that DMA is still running, while in reality, the DMA is paused. Return DMA_PAUSED for tx_status() if the channel is paused in the middle of a transfer. Fixes: ee17028009d4 ("dmaengine: tegra: Add tegra gpcdma driver") Cc: stable@vger.kernel.org Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Signed-off-by: Kartik Rajput <kkartik@nvidia.com> Link: https://lore.kernel.org/r/20241212124412.5650-1-kkartik@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: mv_xor: switch to for_each_child_of_node_scoped()Javier Carrasco
Introduce the scoped variant of the loop to automatically release the child node when it goes out of scope, which is more robust than the non-scoped variant, and accounts for new early exits that could be added in the future. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241011-dma_mv_xor_of_node_put-v1-2-3c2de819f463@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24Merge branch 'fixes' into nextVinod Koul
2024-12-24dmaengine: mv_xor: fix child node refcount handling in early exitJavier Carrasco
The for_each_child_of_node() loop requires explicit calls to of_node_put() to decrement the child's refcount upon early exits (break, goto, return). Add the missing calls in the two early exits before the goto instructions. Cc: stable@vger.kernel.org Fixes: f7d12ef53ddf ("dma: mv_xor: add Device Tree binding") Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241011-dma_mv_xor_of_node_put-v1-1-3c2de819f463@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: bcm2835-dma: Prevent suspend if DMA channel is busyStefan Wahren
bcm2835-dma provides the service to others, so it should suspend late and resume early. Suspend should be prevented in case a DMA channel is still busy. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20241204165546.77941-1-wahrenst@gmx.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: tegra210-adma: Support channel pageMohan Kumar D
Multiple ADMA Channel page hardware support has been added from TEGRA186 and onwards. - Add support in the tegra adma driver to handle selective channel page usage - Make global register programming optional Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> Link: https://lore.kernel.org/r/20241217074358.340180-3-mkumard@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: ti: k3-udma: Add support for J722S CSI BCDMAVaishnav Achath
J722S CSI BCDMA is similar to J721S2 CSI BCDMA but there are slight integration differences like different PSIL thread base ID which is currently handled in the driver based on udma_of_match data. Add an entry to support J722S CSIRX. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://lore.kernel.org/r/20241127101627.617537-3-vaishnav.a@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: ti: edma: fix OF node reference leaks in edma_driverJoe Hattori
The .probe() of edma_driver calls of_parse_phandle_with_fixed_args() but does not release the obtained OF nodes. Thus add a of_node_put() call. This bug was found by an experimental verification tool that I am developing. Fixes: 1be5336bc7ba ("dmaengine: edma: New device tree binding") Signed-off-by: Joe Hattori <joe@pf.is.s.u-tokyo.ac.jp> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/20241219020507.1983124-3-joe@pf.is.s.u-tokyo.ac.jp Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: ti: edma: make the loop condition simpler in edma_probe()Joe Hattori
When i == ecc->num_tc, the edma_probe() calls of_parse_phandle_with_fixed_args() and breaks from the loop regardless of the return value. Since neither the returned value nor the output argument tc_args is used, set i < ecc->num_tc as the loop condition. Signed-off-by: Joe Hattori <joe@pf.is.s.u-tokyo.ac.jp> Link: https://lore.kernel.org/r/20241219020507.1983124-2-joe@pf.is.s.u-tokyo.ac.jp Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: fsl-edma: read/write multiple registers in cyclic transactionsLarisa Grigore
Add support for reading multiple registers in DEV_TO_MEM transactions and for writing multiple registers in MEM_TO_DEV transactions. Signed-off-by: Frank Li <Frank.Li@nxp.com> Co-developed-by: Alexandru-Catalin Ionita <alexandru-catalin.ionita@nxp.com> Signed-off-by: Alexandru-Catalin Ionita <alexandru-catalin.ionita@nxp.com> Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com> Link: https://lore.kernel.org/r/20241219102415.1208328-6-larisa.grigore@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: fsl-edma: add support for S32G based platformsLarisa Grigore
S32G2/S32G3 includes two system eDMA instances based on v3 version, each of them integrated with two DMAMUX blocks. Another particularity of these SoCs is that the interrupts are shared between channels as follows: - DMA Channels 0-15 share the 'tx-0-15' interrupt - DMA Channels 16-31 share the 'tx-16-31' interrupt - all channels share the 'err' interrupt Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com> Co-developed-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20241219102415.1208328-5-larisa.grigore@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: fsl-edma: remove FSL_EDMA_DRV_SPLIT_REG check when parsing muxbaseLarisa Grigore
Clean up dead code. dmamuxs is always 0 when FSL_EDMA_DRV_SPLIT_REG set. So it is redundant to check FSL_EDMA_DRV_SPLIT_REG again in the for loop because it will never enter for loop. Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20241219102415.1208328-3-larisa.grigore@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: fsl-edma: select of_dma_xlate based on the dmamuxs presenceLarisa Grigore
Select the of_dma_xlate function based on the dmamuxs definition rather than the FSL_EDMA_DRV_SPLIT_REG flag, which pertains to the eDMA3 layout. This change is a prerequisite for the S32G platforms, which integrate both eDMAv3 and DMAMUX. Existing platforms with FSL_EDMA_DRV_SPLIT_REG will not be impacted, as they all have dmamuxs set to zero. Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20241219102415.1208328-2-larisa.grigore@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dmaengine: qcom: bam_dma: Avoid writing unavailable registerMd Sadre Alam
Avoid writing unavailable register in BAM-Lite mode. BAM_DESC_CNT_TRSHLD register is unavailable in BAM-Lite mode. Its only available in BAM-NDP mode. So only write this register for clients who is using BAM-NDP. Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Link: https://lore.kernel.org/r/20241220094203.3510335-1-quic_mdalam@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>