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path: root/drivers/gpu/drm/amd/display/dc/clk_mgr
AgeCommit message (Expand)Author
2025-11-11drm/amd/display: refactor DSC cap calculation for dcn35Mohit Bawa
2025-10-28drm/amd/display: init dispclk from bootup clock for DCN315Zhongwei Zhang
2025-10-13drm/amd/display: Remove comparing uint32_t to zeroAlex Hung
2025-10-13drm/amd/display: Prevent Gating DTBCLK before It Is Properly LatchedFangzhi Zuo
2025-09-25drm/amd/display: Reject modes with too high pixel clock on DCE6-10Timur Kristóf
2025-09-23drm/amd/display: Init DCN35 clocks from pre-os HW valuesLeo Li
2025-09-23drm/amd/display: Revert "correct sw cache timing to ensure dispclk ramping"Charlene Liu
2025-09-23drm/amd/display: Correct sw cache timing to ensure dispclk rampingCharlene Liu
2025-09-23drm/amd/display: Refactor SMU tracingDillon Varone
2025-09-23drm/amd/display: Isolate dcn401 SMU functionsDillon Varone
2025-09-23drm/amd/display: Init dispclk from bootup clock for DCN314Lo-an Chen
2025-09-15drm/amd/display: Rename header file link.h to link_service.hWesley Chalmers
2025-09-15drm/amd/display: Add pixel_clock to amd_pp_display_configurationTimur Kristóf
2025-08-29drm/amd/display: use max() to improve codeQianfeng Rong
2025-08-18drm/amd/display: Fix DP audio DTO1 clock source on DCE 6.Timur Kristóf
2025-08-18drm/amd/display: Fill display clock and vblank time in dce110_fill_display_co...Timur Kristóf
2025-08-18drm/amd/display: Find first CRTC and its line time in dce110_fill_display_con...Timur Kristóf
2025-08-18drm/amd/display: Adjust DCE 8-10 clock, don't overclock by 15%Timur Kristóf
2025-08-18drm/amd/display: Don't overclock DCE 6 by 15%Timur Kristóf
2025-08-04drm/amd/display: update dpp/disp clock from smu clock tablePaul Hsieh
2025-08-04drm/amd/display: Fix DCE 6.0 and 6.4 PLL programming.Timur Kristóf
2025-08-04drm/amd/display: Don't overwrite dce60_clk_mgrTimur Kristóf
2025-07-15drm/amd/display: Initial support for SmartMuxAurabindo Pillai
2025-07-15drm/amd/display: Free memory allocationClayton King
2025-07-15drm/amd/display: Refactor DSC cap calculationsDillon Varone
2025-06-18drm/amd/display: Refactor DML2 DC power instanceDillon Varone
2025-06-18drm/amd/display: Remove dml/dcn401 files and referencesDillon Varone
2025-04-22drm/amd/display: Remove unused *vbios_smu_set_dprefclkDr. David Alan Gilbert
2025-04-07drm/amd/display: rename IPS2 entry/exit messageSherry Wang
2025-04-07drm/amd/display: Correct SSC enable detection for DCN351Kevin Gao
2025-04-07drm/amd/display: Use sync version of indirect register access.JinZe.Xu
2025-03-18drm/amd/display: Guard against setting dispclk low for dcn31xJing Zhou
2025-03-18drm/amd/display: Check pipe->stream before passing it to a functionAlex Hung
2025-03-10drm/amd/display: remove minimum Dispclk and apply oem panel timing.Charlene Liu
2025-03-05drm/amd/display: misc for dio encoder refactorPeichen Huang
2025-02-19drm/amd/display: Guard against setting dispclk low when activeNicholas Kazlauskas
2025-02-12drm/amd/display: Exclude clkoffset and ips setting for dcn351 specificCharlene Liu
2025-02-12drm/amd/display: Populate register address for dentist for dcn401Dillon Varone
2025-01-28drm/amd/display: Correct register address in dcn35loanchen
2025-01-10drm/amd/display: avoid reset DTBCLK at clock initCharlene Liu
2025-01-10drm/amd/display: Add SMU interface to get UMC count for dcn401Dillon Varone
2025-01-10drm/amd/display: Log Hard Min Clocks and Phantom Pipe StatusSung Lee
2025-01-06drm/amd/display: Cleanup outdated interfaces in dcn401_clk_mgrDillon Varone
2024-12-18drm/amd/display: Add new message for DF throttling optimization on dcn401Dillon Varone
2024-12-10drm/amdgpu: rename register headers to dcn_2_0_1Leo Li
2024-12-10drm/amd/display: update dcn351 used clock offsetCharlene Liu
2024-12-10drm/amd/display: correct dcn351 dpm clk table based on pmfw_drv_ifCharlene Liu
2024-11-04drm/amd/display: Remove otg w/a toggling on HPO interfacesAusef Yousof
2024-11-04drm/amd/display: Remove hw w/a toggle if on DP2/HPOAusef Yousof
2024-10-28drm/amd/display: Simplify dcn35_is_ips_supported()Alex Hung
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