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2025-02-28Merge branch 'ib-amlogic-a4' into develLinus Walleij
Merge immutable branch into devel for next. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-28dt-bindings: pinctrl: Add support for Amlogic A4 SoCXianwei Zhao
Add the dt-bindings for Amlogic pin controller, and add a new dt-binding header file which document the GPIO bank names of Amlogic A4 SoC. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250212-amlogic-pinctrl-v5-1-282bc2516804@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-27dt-bindings: pinctrl: Add pinctrl for Sophgo SG2042 series SoCInochi Amaoto
SG2042 introduces a simple pinctrl device for all configurable pins. For the SG2042 pinctl register file, each register (32 bits) is responsible for two pins, each occupying the upper 16 bits and lower 16 bits of the register. It supports setting pull up/down, drive strength and input schmitt trigger. Add support for SG2042 pinctrl device. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250211051801.470800-6-inochiama@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-03Merge tag 'renesas-r9a09g047-dt-binding-defs-tag2' into ↵Geert Uytterhoeven
renesas-pinctrl-for-v6.14 Renesas RZ/G3E Pin Control DT Binding Definitions Pin control DT bindings and binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files.
2025-01-03Merge tag 'renesas-r9a09g057-dt-binding-defs-tag2' into ↵Geert Uytterhoeven
renesas-pinctrl-for-v6.14 Renesas RZ/V2H Pin Control DT Binding Definitions Pin control DT binding definitions for the Renesas RZ/V2H (R9A09G057) SoC, shared by driver and DT source files.
2025-01-03dt-bindings: pinctrl: renesas: Document RZ/G3E SoCBiju Das
Add documentation for the pin controller found on the Renesas RZ/G3E (R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has more pins(P00-PS3). Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216195325.164212-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-01-03dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2HBiju Das
RZ/V2H has ports P0-P9 and PA-PB. Add support for defining alpha-numerical ports in DT using RZV2H_* macros. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216195325.164212-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-08-26dt-bindings: pinctrl: Add pinctrl for Sophgo CV1800 series SoC.Inochi Amaoto
Add pinctrl support for Sophgo CV1800 series SoC. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/IA1PR20MB4953680DE7977CAD906DBDB4BBB32@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-25dt-bindings: pinctrl: samsung: drop unused header with register constantsKrzysztof Kozlowski
The bindings header for Samsung pin controller DTS pin values (holding register values in fact) was deprecated in v6.1 kernel in commit 9d9292576810 ("dt-bindings: pinctrl: samsung: deprecate header with register constants"). This was enough of time for users to switch to in-DTS headers, so drop the bindings header. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240312164428.692552-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-06-30Merge tag 'pinctrl-v6.5-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time New drivers: - Tegra234 support - Qualcomm IPQ5018 support - Intel Meteor Lake-S support - Qualcomm SDX75 subdriver - Qualcomm SPMI-based PM8953 support Improvements: - Fix up support for GPIO3 on the AXP209 - Push-pull drive configuration support for the AT91 PIO4 - Fix misc non-urgent bugs in the AMD driver - Misc non-urgent improved error handling - Misc janitorial and minor improvements" * tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: cherryview: Drop goto label pinctrl: baytrail: invert if condition pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook pinctrl: tegra: avoid duplicate field initializers dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function pinctrl: mlxbf3: remove broken Kconfig 'select' pinctrl: spear: Remove unused of_gpio.h inclusion pinctrl: lantiq: Remove unused of_gpio.h inclusion pinctrl: at91-pio4: check return value of devm_kasprintf() pinctrl: microchip-sgpio: check return value of devm_kasprintf() pinctrl: freescale: Fix a memory out of bounds when num_configs is 1 pinctrl: intel: refine ->irq_set_type() hook pinctrl: intel: refine ->set_mux() hook pinctrl: baytrail: Use str_hi_lo() helper lib/string_choices: Add str_high_low() helper lib/string_helpers: Split out string_choices.h lib/string_helpers: Add missing header files to MAINTAINERS database pinctrl: npcm7xx: Add missing check for ioremap pinctrl:sunplus: Add check for kmalloc ...
2023-06-09dt-bindings: pinctrl: Drop k3Nishanth Menon
For convenience (less code duplication), the pin controller pin configuration register values were defined in the bindings header. These are not some IDs or other abstraction layer but raw numbers used in the registers. These constants do not fit the purpose of bindings. They do not provide any abstraction, any hardware and driver independent ID. In fact, the Linux pinctrl-single driver actually do not use the bindings header at all. Commit f2de003e1426 ("dt-bindings: pinctrl: k3: Deprecate header with register constants") already moved users to the local header, so, drop the binding header. See background discussion in [1]. While at it, clean up the MAINTAINERS file which is the only reference left. [1]: https://lore.kernel.org/linux-arm-kernel/71c7feff-4189-f12f-7353-bce41a61119d@linaro.org/ Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230601173831.982429-1-nm@ti.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-08dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packagesAlexandre Torgue
Add support for st,stm32mp257-pinctrl and st,stm32mp257-z-pinctrl. Add packages AI, AK and AL (values : 0x100, 0x400 and 0x800) Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-20dt-bindings: pinctrl: k3: Deprecate header with register constantsNishanth Menon
For convenience (less code duplication), the pin controller pin configuration register values were defined in the bindings header. These are not some IDs or other abstraction layer but raw numbers used in the registers. These constants do not fit the purpose of bindings. They do not provide any abstraction, any hardware and driver independent ID. In fact, the Linux pinctrl-single driver actually do not use the bindings header at all. All of the constants were moved already to headers local to DTS (residing in DTS directory), so remove any references to the bindings header and add a warning that it is deprecated. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/linux-arm-kernel/71c7feff-4189-f12f-7353-bce41a61119d@linaro.org/ Link: https://lore.kernel.org/r/20230315155228.1566883-4-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-02-22Merge tag 'pinctrl-v6.3-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing special, notably a lot of new Qualcomm hardware is supported, a RISC-V reference SoC and then some cleanups both in code and device tree bindings. Core changes: - Add PINCTRL_PINFUNCTION() macro and use it in several drivers New drivers: - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on) pin controllers. (RISC-V.) - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin controllers - New subdriver for the Qualcomm SA8775P SoC pin controller - New subdriver for the Qualcomm IPQ5332 SoC pin controller - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin control - New subdriver for the Mediatek MT7981 SoC pin controller Improvements: - Several cleanups and refactorings to the Intel drivers - Add 4KOhm bias support to the Intel driver - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver - Support general purpose clocks in the Qualcomm MSM8226 SoC - Several conversions to use the new I2C .probe_new() call - Massive clean-up of the Qualcomm Device Tree YAML schemas - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC driver" * tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits) pinctrl: qcom: Add support for i2c specific pull feature pinctrl: starfive: Add StarFive JH7110 aon controller driver pinctrl: starfive: Add StarFive JH7110 sys controller driver dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl pinctrl: add mt7981 pinctrl driver dt-bindings: pinctrl: add bindings for MT7981 SoC dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated pinctrl: qcom: Introduce IPQ5332 TLMM driver dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS pinctrl: at91: use devm_kasprintf() to avoid potential leaks dt-bindings: pinctrl: qcom: correct gpio-ranges in examples dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example ...
2023-02-10dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrlJianlong Huang
Add pinctrl bindings for StarFive JH7110 SoC aon pinctrl controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-3-hal.feng@starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-10dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrlJianlong Huang
Add pinctrl bindings for StarFive JH7110 SoC sys pinctrl controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-2-hal.feng@starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-15dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4Apurva Nandan
Add pinctrl macros for J784s4 SoC. These macro definitions are similar to that of J721s2, but adding new definitions to avoid any naming confusions in the soc dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230112142725.77785-3-a-nandan@ti.com
2022-11-10dt-bindings: pinctrl: Correct the header guard of mt6795-pinfunc.hWei Li
Rename the header guard of mt6795-pinfunc.h from __DTS_MT8173_PINFUNC_H to __DTS_MT6795_PINFUNC_H what corresponding with the file name. Fixes: 81557a71564a ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings") Signed-off-by: Wei Li <liwei391@huawei.com> Link: https://lore.kernel.org/r/20221108094529.3597920-1-liwei391@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-11Merge tag 'pinctrl-v6.1-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "There is nothing exciting going on, no core changes, just a few drivers and cleanups. New drivers: - Cypress CY8C95x0 chip pin control support, along with an immediate cleanup - Mediatek MT8188 SoC pin control support - Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin control support - Qualcomm PM7250, PM8450 - Rockchip RV1126 SoC pin control support Improvements: - Fix some missing pins in the Armada 37xx driver - Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro - Fix some GPIO irq_chips to be immutable - Massive Qualcomm device tree binding cleanup, with more to come" * tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits) MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100" pinctrl: Create subdirectory for StarFive drivers dt-bindings: pinctrl: st,stm32: Document interrupt-controller property dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property dt-bindings: pinctrl: st,stm32: Document gpio-line-names pinctrl: st: stop abusing of_get_named_gpio() pinctrl: wpcm450: Correct the fwnode_irq_get() return value check pinctrl: bcm: Remove unused struct bcm6328_pingroup pinctrl: qcom: restrict drivers per ARM/ARM64 pinctrl: bcm: ns: Remove redundant dev_err call gpio: rockchip: request GPIO mux to pinctrl when setting direction pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops pinctrl: cy8c95x0: Drop atomicity on operations on push_pull pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux() pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper pinctrl: stm32: Switch to use dev_err_probe() helper dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings pinctrl: qcom: spmi-gpio: Add compatible for PM7250B ...
2022-10-04pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"Jianlong Huang
Add the SoC name to make it more clear. Also the next generation StarFive SoCs will use "pinctrl-starfive" as the core of StarFive pinctrl driver. No functional change. Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930061404.5418-1-hal.feng@linux.starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-14Merge tag 'samsung-pinctrl-6.1' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.1 1. Minor fix in order of initializing pinctrl driver - GPIOs should be configured before registering gpiolib. 2. Final steps to deprecated bindings headers with register constants. The constants were moved to include files in DTS directories, because these are not suitable for bindings. Remove final references and mark binding header as deprecated to warn any users.
2022-09-13dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62AVignesh Raghavendra
Add pinctrl macros for AM62AX SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Devarsh Thakkar <devarsht@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220901141328.899100-4-vigneshr@ti.com
2022-09-13dt-bindings: arm: ti: Rearrange IOPAD macros alphabeticallyVignesh Raghavendra
Rearrange SOC specific IOPAD macros alphabetically, so that its easier to read. No functional change intended. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Devarsh Thakkar <devarsht@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220901141328.899100-2-vigneshr@ti.com
2022-08-25dt-bindings: pinctrl: mediatek: add support for mt8188Hui.Liu
Add the pinctrl header file on MediaTek mt8188. Add the new binding document for pinctrl on MediaTek mt8188. Signed-off-by: Hui.Liu <hui.liu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220818075012.20880-2-hui.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-19dt-bindings: pinctrl: samsung: deprecate header with register constantsKrzysztof Kozlowski
For convenience (less code duplication, some meaning added to raw number), the pin controller pin configuration register values were defined in the bindings header. These are not some IDs or other abstraction layer but raw numbers used in the registers These constants do not fit the purpose of bindings. They do not provide any abstraction, any hardware and driver independent ID. With minor exceptions, the Linux drivers actually do not use the bindings header at all. All of the constants were moved already to headers local to DTS (residing in DTS directory) and to Samsung pinctrl driver (where applicable), so remove any references to the bindings header and add a warning tha tit is deprecated. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220816133016.77553-3-krzysztof.kozlowski@linaro.org
2022-08-10Merge tag 'pinctrl-v6.0-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Outside the pinctrl driver and DT bindings we hit some Arm DT files, patched by the maintainers. Other than that it is business as usual. Core changes: - Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver). New drivers: - Intel Meteor Lake support. - Reneasas RZ/V2M and r8a779g0 (R-Car V4H). - AXP209 variants AXP221, AXP223 and AXP809. - Qualcomm MSM8909, PM8226, PMP8074 and SM6375. - Allwinner D1. Improvements: - Proper pin multiplexing in the AMD driver. - Mediatek MT8192 can use generic drive strength and pin bias, then fixes on top plus some I2C pin group fixes. - Have the Allwinner Sunplus SP7021 use the generic DT schema and make interrupts optional. - Handle Qualcomm SC7280 ADSP. - Handle Qualcomm MSM8916 CAMSS GP clock muxing. - High impedance bias on ZynqMP. - Serialize StarFive access to MMIO. - Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO" * tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (117 commits) dt-bindings: pinctrl: qcom,pmic-gpio: add PM8226 constraints pinctrl: qcom: Make PINCTRL_SM8450 depend on PINCTRL_MSM pinctrl: qcom: sm8250: Fix PDC map pinctrl: amd: Fix an unused variable dt-bindings: pinctrl: mt8186: Add and use drive-strength-microamp dt-bindings: pinctrl: mt8186: Add gpio-line-names property ARM: dts: imxrt1170-pinfunc: Add pinctrl binding header pinctrl: amd: Use unicode for debugfs output pinctrl: amd: Fix newline declaration in debugfs output pinctrl: at91: Fix typo 'the the' in comment dt-bindings: pinctrl: st,stm32: Correct 'resets' property name pinctrl: mvebu: Missing a blank line after declarations. pinctrl: qcom: Add SM6375 TLMM driver dt-bindings: pinctrl: Add DT schema for SM6375 TLMM dt-bindings: pinctrl: mt8195: Use drive-strength-microamp in examples Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable" pinctrl: imx93: Add MODULE_DEVICE_TABLE() pinctrl: sunxi: Add driver for Allwinner D1 pinctrl: sunxi: Make some layout parameters dynamic pinctrl: sunxi: Refactor register/offset calculation ...
2022-07-01dt-bindings: pinctrl: Add DT bindings for Renesas RZ/V2M pinctrlPhil Edworthy
Add device tree binding documentation and header file for Renesas RZ/V2M pinctrl. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220624084833.22605-2-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29dt-bindings: pinctrl: renesas: Remove spaces before #defineGeert Uytterhoeven
Remove spaces at the beginning of lines with #defines. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/5188ef93a911ce3781b16530fdebbf0f0af462b6.1655301264.git.geert+renesas@glider.be
2022-06-10treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULEThomas Gleixner
Based on the normalized pattern: this program is free software you can redistribute it and/or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed as is without any warranty of any kind whether express or implied without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal <allison@lohutok.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-19dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindingsAngeloGioacchino Del Regno
Add devicetree and pinfunc bindings for MediaTek Helio X10 MT6795. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220517083957.11816-2-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-28Merge tag 'pinctrl-v5.18-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time. Just new driver code and improvements! New drivers: - New driver for the Broadcom BCM4908 SoC. - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative of the Samsung Exynos pin control driver. - New driver for the Amlogic Meson S4 SoC. - New driver for the Sunplus SP7021 SoC. - New driver for the Microsemi Ocelot family ServalT SoC. - New subdriver for Intel Alder Lake-M SoC. - New subdriver for Intel Ice Lake-N SoC, including PCH support. - New subdriver for Renesas R8A779F0 SoC. - New subdriver for Mediatek MT8186 SoC. - New subdriver for NXP Freescale i.MX93 SoC. - New driver for Nuvoton WPCM450 SoC. - New driver for Qualcomm SC8280XP SoC. Improvements: - Wakeup support on Samsung Exynos850 and ExynosAutov9. - Serious and voluminous maintenance cleanup and refactoring in the Renesas drivers. Mainly sharing similar data between the different SoC subdrivers. - Qualcomm SM8450 EGPIO support. - Drive strength support on the Mediatek MT8195. - Add some missing groups and functions to the Ralink RT2880" * tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits) pinctrl: mediatek: common-v1: fix semicolon.cocci warnings pinctrl: nuvoton: wpcm450: Fix build error without OF pinctrl: qcom-pmic-gpio: Add support for pm8450 dt-bindings: pinctrl: aspeed: Update gfx node in example dt-bindings: pinctrl: rt2880: add missing pin groups and functions pinctrl: ingenic: Fix regmap on X series SoCs pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register() pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register() pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS pinctrl: nuvoton: Fix sparse warning pinctrl: mediatek: mt8186: Account for probe refactoring pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback pinctrl: mediatek: common-v1: Commonize spec_pupd callback pinctrl: mediatek: common-v1: Use common probe function pinctrl: mediatek: common-v1: Add common probe function pinctrl: mediatek: paris: Unify probe function by using OF match data pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe pinctrl: berlin: fix error return code of berlin_pinctrl_build_state() pinctrl: qcom: Introduce sc8280xp TLMM driver ...
2022-03-15dt-bindings: pinctrl: mt8186: add pinctrl file and binding documentGuodong Liu
1. This patch adds pinctrl file for mt8186. 2. This patch adds mt8186 compatible node in binding document. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220216032124.28067-2-guodong.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-28dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62Suman Anna
Add pinctrl macros for AM62x SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220225120239.1303821-4-vigneshr@ti.com
2022-01-30dt-bindings: pinctrl: Add dt-bindings for Sunplus SP7021Wells Lu
Add dt-bindings header files and documentation for Sunplus SP7021 SoC. Signed-off-by: Wells Lu <wellslutw@gmail.com> Link: https://lore.kernel.org/r/1642344734-27229-2-git-send-email-wellslutw@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-10Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull RISC-V SoC updates from Arnd Bergmann: "Add support for StarFive JH7100 RISC-V SoC This adds support for the StarFive JH7100, including the necessary device drivers and DT files for the BeagleV Starlight prototype board, with additional boards to be added later. This SoC promises to be the first usable low-cost platform for RISC-V. I've taken this through the SoC tree in the anticipation of adding a few other Arm based SoCs as well, but those did not pass the review in time, so it's only this one" * tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: reset: starfive-jh7100: Fix 32bit compilation RISC-V: Add BeagleV Starlight Beta device tree RISC-V: Add initial StarFive JH7100 device tree serial: 8250_dw: Add StarFive JH7100 quirk dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts pinctrl: starfive: Add pinctrl driver for StarFive SoCs dt-bindings: pinctrl: Add StarFive JH7100 bindings dt-bindings: pinctrl: Add StarFive pinctrl definitions reset: starfive-jh7100: Add StarFive JH7100 reset driver dt-bindings: reset: Add Starfive JH7100 reset bindings dt-bindings: reset: Add StarFive JH7100 reset definitions clk: starfive: Add JH7100 clock generator driver dt-bindings: clock: starfive: Add JH7100 bindings dt-bindings: clock: starfive: Add JH7100 clock definitions dt-bindings: interrupt-controller: Add StarFive JH7100 plic dt-bindings: timer: Add StarFive JH7100 clint RISC-V: Add StarFive SoC Kconfig option
2021-12-20Merge tag 'samsung-dt64-5.17' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.17 1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink E850-96 board and WinLink vendor prefix. 2. Add pinctrl definitions used for Exynos850. 3. Minor fixes and improvements. 4. Convert serial on ExynosAutov9 to new hierarchy where serial is part of USI node. * tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850 dt-bindings: arm: samsung: Document E850-96 board binding dt-bindings: Add vendor prefix for WinLink dt-bindings: arm: samsung: document jackpotlte board binding dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9 dt-bindings: soc: samsung: Add Exynos USI bindings arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7 Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850Sam Protsenko
All Exynos850 GPIO blocks can use EXYNOS5420_PIN_DRV* definitions, except GPIO_HSI block. Add pin drive strength definitions for GPIO_HSI block correspondingly. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211217161549.24836-6-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-16dt-bindings: pinctrl: Add StarFive pinctrl definitionsEmil Renner Berthing
Add definitons for pins and GPIO input, output and output enable signals on the StarFive JH7100 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-13dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2Aswath Govindraju
Add pinctrl macros for J721S2 SoC. These macro definitions are similar to that of J721E, but adding new definitions to avoid any naming confusions in the soc dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211207080904.14324-3-a-govindraju@ti.com
2021-10-03dt-bindings: pinctrl: mt8195: add rsel defineZhiyong Tao
This patch adds rsel define for mt8195. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210924080632.28410-2-zhiyong.tao@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-14Merge tag 'renesas-pinctrl-for-v5.15-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.15 (take two) - Add pin control and GPIO support for the new RZ/G2L SoC.
2021-08-11Merge branch 'ib-mt8135' into develLinus Walleij
2021-08-11arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrlHsin-Yi Wang
Move mt8183-pinfunc.h into include/dt-bindings/pinctrl so that we can include it in yaml examples. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210804044033.3047296-2-hsinyi@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrlHsin-Yi Wang
Move mt8135-pinfunc.h into include/dt-bindings/pinctrl so that we can include it in yaml examples. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210804044033.3047296-1-hsinyi@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-10dt-bindings: pinctrl: renesas: Add DT bindings for RZ/G2L pinctrlLad Prabhakar
Add device tree binding documentation and header file for Renesas RZ/G2L pinctrl. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210727112328.18809-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-07-30dt-bindings: pinctrl-zynq: Replace 'io-standard' with 'power-source'Sai Krishna Potthuri
Replace custom pin configuration option 'io-standard' with generic property 'power-source' for Zynq pinctrl also add dt-binding file contains pin configuration defines for Zynq pinctrl. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1626868353-96475-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-10Merge tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM devicetree updates from Olof Johansson: "Like always, the DT branch is sizable. There are numerous additions and fixes to existing platforms, but also a handful of new ones introduced. Less than some other releases, but there's been significant work on cleanups, refactorings and device enabling on existing platforms. A non-exhaustive list of new material: - Refactoring of BCM2711 dtsi structure to add support for the Raspberry Pi 400 - Rockchip: RK3568 SoC and EVB, video codecs for rk3036/3066/3188/322x - Qualcomm: SA8155p Automotive platform (SM8150 derivative), SM8150/8250 enhancements and support for Sony Xperia 1/1II and 5/5II - TI K3: PCI/USB3 support on AM64-sk boards, R5 remoteproc definitions - TI OMAP: Various cleanups - Tegra: Audio support for Jetson Xavier NX, SMMU support on Tegra194 - Qualcomm: lots of additions for peripherals across several SoCs, and new support for Microsoft Surface Duo (SM8150-based), Huawei Ascend G7. - i.MX: Numerous additions of features across SoCs and boards. - Allwinner: More device bindings for V3s, Forlinx OKA40i-C and NanoPi R1S H5 boards - MediaTek: More device bindings for mt8167, new Chromebook system variants for mt8183 - Renesas: RZ/G2L SoC and EVK added - Amlogic: BananaPi BPI-M5 board added" * tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (511 commits) arm64: dts: rockchip: add basic dts for RK3568 EVB arm64: dts: rockchip: add core dtsi for RK3568 SoC arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs ARM: dts: rockchip: add vpu and vdec node for RK322x ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188 ARM: dts: rockchip: add vpu node for RK3036 arm64: dts: ipq8074: Add QUP6 I2C node arm64: dts: rockchip: Re-add regulator-always-on for vcc_sdio for rk3399-roc-pc arm64: dts: rockchip: Re-add regulator-boot-on, regulator-always-on for vdd_gpu on rk3399-roc-pc arm64: dts: rockchip: add ir-receiver for rk3399-roc-pc arm64: dts: rockchip: Add USB-C port details for rk3399 Firefly arm64: dts: rockchip: Sort rk3399 firefly pinmux entries arm64: dts: rockchip: add infrared receiver node to RK3399 Firefly arm64: dts: rockchip: add SPDIF node for rk3399-firefly arm64: dts: rockchip: Add Rotation Property for OGA Panel arm64: dts: qcom: sc7180: bus votes for eMMC and SD card arm64: dts: qcom: sm8250-edo: Add Samsung touchscreen arm64: dts: qcom: sm8250-edo: Enable GPI DMA arm64: dts: qcom: sm8250-edo: Enable ADSP/CDSP/SLPI arm64: dts: qcom: sm8250-edo: Enable PCIe ...
2021-06-17arm64: dts: hisilicon: use the correct HiSilicon copyrightHao Fang
s/Hisilicon/HiSilicon/. It should use capital S, according to the official website https://www.hisilicon.com/en. Signed-off-by: Hao Fang <fanghao11@huawei.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-05-27dt-bindings: pinctrl: mt65xx: add mt8365 SoC bindingFabien Parent
Add binding documentation for MT8365 Pin controller. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210519162409.3755679-1-fparent@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-25dt-bindings: pinctrl: Add DT bindings for apple, pinctrlMark Kettenis
The Apple GPIO controller is a simple combined pin and GPIO conroller present on Apple ARM SoC platforms, including various iPhone and iPad devices and the "Apple Silicon" Macs. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Link: https://lore.kernel.org/r/20210520171310.772-2-mark.kettenis@xs4all.nl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit (git 2.34.1) at 2025-07-16 13:24:41 +0000