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Defining i2s_bclk and i2s_sysclk as fixed-rate clocks is insufficient
for real I2S use cases.
Moreover, the current I2S clock configuration does not work as expected
due to missing parent clocks.
This patch adds the missing parent clocks, defines i2s_sysclk as
a DDN clock, and i2s_bclk as a DIV clock.
A special note for i2s_bclk:
From the register definition, the i2s_bclk divider always implies
an additional 1/2 factor.
The following table shows the correspondence between index
and frequency division coefficients:
| index | div |
|-------|-------|
| 0 | 2 |
| 1 | 4 |
| 2 | 6 |
| 3 | 8 |
From a software perspective, introducing i2s_bclk_factor as the
parent of i2s_bclk is sufficient to address the issue.
The I2S-related clock registers can be found here [1].
Link:
https://developer.spacemit.com/documentation?token=LCrKwWDasiJuROkVNusc2pWTnEb
[1]
Fixes: 1b72c59db0add ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Co-developer: Jinmei Wei <weijinmei@linux.spacemit.com>
Suggested-by: Haylen Chu <heylenay@4d2.org>
Signed-off-by: Jinmei Wei <weijinmei@linux.spacemit.com>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Implement reset support for SpacemiT CCUs. A SpacemiT reset controller
device is an auxiliary device associated with a clock controller (CCU).
This patch defines the reset controllers for the MPMU, APBC, and MPMU
CCUs, which already define clock controllers. It also adds RCPU, RCPU2,
and ACPB2 CCUs, which only define resets.
Signed-off-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20250702113709.291748-6-elder@riscstar.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
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Add a new reset_name field to the spacemit_ccu_data structure. If it is
non-null, the CCU implements a reset controller, and the name will be
used in the name for the auxiliary device that implements it.
Define a new type to hold an auxiliary device as well as the regmap
pointer that will be needed by CCU reset controllers. Set up code to
initialize and add an auxiliary device for any CCU that implements reset
functionality.
Make it optional for a CCU to implement a clock controller. This
doesn't apply to any of the existing CCUs but will for some new ones
that will be added soon.
Signed-off-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Haylen Chu <heylenay@4d2.org>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250702113709.291748-4-elder@riscstar.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
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Move the definitions of register offsets and fields used by the SpacemiT
K1 SoC CCUs into a separate header file, so that they can be shared by
the reset driver that will be found under drivers/reset.
Signed-off-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Haylen Chu <heylenay@4d2.org>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250702113709.291748-3-elder@riscstar.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
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