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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2025-04-22 17:30:40 +0530 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2025-05-02 08:29:39 -0500 |
| commit | 5a765365c689b90ea81f651a43bc30cd9c9c4ed8 (patch) | |
| tree | bf154808f49b0ebadd4591efc265ca0250e31561 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | f0f78192d3b3b3c3c935de0d681e7bf2117bbb13 (diff) | |
arm64: dts: ti: k3-j721s2-main: Switch to 64-bit address space for PCIe1
The PCIe1 instance of PCIe in J721S2 SoC supports:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space
The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-6-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions