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| author | Mao Jinlong <quic_jinlmao@quicinc.com> | 2025-02-25 22:40:06 -0800 |
|---|---|---|
| committer | Suzuki K Poulose <suzuki.poulose@arm.com> | 2025-02-26 11:25:10 +0000 |
| commit | ee39dbe9395bd91435aed0194abc3c7c83dba146 (patch) | |
| tree | 23c44fffc0708bd55812de8d7d70add58667eda3 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 4ff6039ffb79a4a8a44b63810a8a2f2b43264856 (diff) | |
coresight-tpdm: Add MCMB dataset support
MCMB (Multi-lane CMB) is a special form of CMB dataset type. MCMB
subunit TPDM has the same number and usage of registers as CMB
subunit TPDM. MCMB subunit can be enabled for data collection by
writing 1 to the first bit of CMB_CR register. The difference is
that MCMB subunit TPDM needs to select the lane and enable it in
using it.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250226064008.2531037-2-quic_jinlmao@quicinc.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions