diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-08-22 15:33:20 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-08-31 12:59:22 +0200 |
| commit | a29bf0b10a1a7f51afb91c1ff9edd73b0ca1fd18 (patch) | |
| tree | a6f561112092469ce801919201780456f6c46a70 | |
| parent | 613fb0c8bd49df4fb28bca89aa5363856487096f (diff) | |
arm64: dts: socionext: uniphier-pxs3: Add default PCI interrup controller address cells
Add missing address-cells 0 to the PCI interrupt node to silence W=1
warning:
uniphier-pxs3.dtsi:915.4-918.29: Warning (interrupt_map): /soc@0/pcie@66000000:interrupt-map:
Missing property '#address-cells' in node /soc@0/pcie@66000000/legacy-interrupt-controller, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0)
Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20250822133318.312232-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index d6e3cc6fdb25..4d6c3c2dbea6 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -921,6 +921,7 @@ pcie_intc: legacy-interrupt-controller { interrupt-controller; + #address-cells = <0>; #interrupt-cells = <1>; interrupt-parent = <&gic>; interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |