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authorMiquel Raynal <miquel.raynal@bootlin.com>2025-11-05 18:27:01 +0100
committerPratyush Yadav <pratyush@kernel.org>2025-11-06 15:56:06 +0100
commita607e676c8b9258eabc3fc88f45bcd70ea178b41 (patch)
treed9c7ffceb78428f26f4288907c80a0814fb3f8f8
parentaee8c4d9d48d661624d72de670ebe5c6b5687842 (diff)
mtd: spi-nor: winbond: Add support for W25Q01NWxxIM chips
These chips must be described as none of the block protection information are discoverable. This chip supports 4 bits plus the top/bottom addressing capability to identify the protected blocks. Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
-rw-r--r--drivers/mtd/spi-nor/winbond.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index a13a1201eae9..580c9cb37958 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -347,6 +347,10 @@ static const struct flash_info winbond_nor_parts[] = {
/* W25Q01NWxxIQ */
.id = SNOR_ID(0xef, 0x60, 0x21),
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
+ }, {
+ /* W25Q01NWxxIM */
+ .id = SNOR_ID(0xef, 0x80, 0x21),
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
},
};