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authorChaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>2025-05-23 11:50:38 +0530
committerAnimesh Manna <animesh.manna@intel.com>2025-05-26 13:18:16 +0530
commitb0e0369bca338bb6a07466838cef6c6e5a1a55b9 (patch)
tree75b8b89aaa86d000d353223ad18b7a7bf7e1bfd2 /scripts/gdb/linux/utils.py
parent9dae0b6e9c8c05931c1708fa9e0f4d69166a61c0 (diff)
drm/i915/display: use GOSUB to program double buffered LUT registers
With addition of double buffered GAMMA registers in PTL, we can now program them in the active region. Use GOSUB instruction of DSB to program them. It is done in the following steps: 1. intel_color_prepare_commit() - If the platform supports, prepare a dsb instance (dsb_color) hooked to DSB0. - Add all the register write instructions to dsb_color through the load_lut() hook - Do not add the vrr_send_push() logic to the buffer as it should be taken care by dsb_commit instance of DSB0 - Finish preparation of the buffer by aligning it to 64 bit 2. intel_atomic_dsb_finish() - Add the gosub instruction into the dsb_commit instance of DSB0 using intel_dsb_gosub() - If needed, add the vrr_send_push() logic to dsb_commit after it v2: Refactor code to simplify commit completion flow. Add some helpers along the way (Ville) v3: s/doubled/double and add display to commit message prefix (Uma) Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250523062041.166468-9-chaitanya.kumar.borah@intel.com
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