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| author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2025-06-16 04:11:11 +0300 |
|---|---|---|
| committer | Hans Verkuil <hverkuil+cisco@kernel.org> | 2025-08-31 11:10:07 +0200 |
| commit | 4435a7a3fc283011a7b3e9c3b157aac8384333bd (patch) | |
| tree | c55f713f8e2338ad5874424521e69261e011a5d5 /tools/perf/scripts/python/task-analyzer.py | |
| parent | acfaba169385bfa243a10a027f8272a974b2288a (diff) | |
dt-bindings: media: rkisp1: Add second power domain on i.MX8MP
In the NXP i.MX8MP, the pclk clock required by the ISP is gated by the
MIPI CSI-2 power domain. Add it to the power-domains property, and
require specifying power-domain-names accordingly.
Link: https://lore.kernel.org/r/20250616011115.19515-3-laurent.pinchart@ideasonboard.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions