Age | Commit message (Collapse) | Author |
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Add docs on how CXL capacity interacts with CMA and HugeTLB allocation
interfaces.
Signed-off-by: Gregory Price <gourry@gourry.net>
Link: https://patch.msgid.link/20250512162134.3596150-17-gourry@gourry.net
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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Document a bit about how reclaim interacts with various CXL
configurations.
Signed-off-by: Gregory Price <gourry@gourry.net>
Link: https://patch.msgid.link/20250512162134.3596150-16-gourry@gourry.net
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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Document some interesting interactions that occur when exposing CXL
memory capacity to page allocator.
Signed-off-by: Gregory Price <gourry@gourry.net>
Link: https://patch.msgid.link/20250512162134.3596150-15-gourry@gourry.net
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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Small example of accessing CXL memory capacity via DAX device
Signed-off-by: Gregory Price <gourry@gourry.net>
Link: https://patch.msgid.link/20250512162134.3596150-14-gourry@gourry.net
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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