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path: root/drivers/gpu/drm/nouveau/include/nvkm/engine
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2025-05-19drm/nouveau/gsp: add common code for engines/engine objectsBen Skeggs
With minimal to no direct HW programming required, most nvkm_engine implementations are nearly identical when running on top of GSP-RM. Add a common implementation of the boilerplate, and use nvkm_rm_gpu to expose the correct class IDs. As they're now handled by common code, and there's no support for them prior to GSP-RM support - this deletes the GA100 NVDEC/NVJPG/OFA HALs, the GA102 NVENC/OFA HALs, and the AD102 GR/NVDEC/NVENC/NVJPG/OFA HALs. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2025-05-19drm/nouveau/gsp: add display class ids to gpu halBen Skeggs
Use display class IDs from nvkm_rm_gpu, instead of copying them from the non-GSP HALs. Removes the AD102 display HAL, which is no longer required as there's no support for it without GSP-RM. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2025-05-19drm/nouveau/gsp: remove gsp-specific chid allocation pathBen Skeggs
In order to specify a channel ID to RM during channel allocation, the channel ID is broken down into a "userd page" index and an index into that page. It was assumed that RM would enforce that the same physical block of memory be used for all CHIDs within a "userd page", and the GSP paths override NVKM's normal CHID allocation to handle this. However, none of that turns out to be necessary. Remove the GSP-specific code and use the regular CHID allocation path. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2024-07-27drm/nouveau/nvkm: remove perfmonBen Skeggs
This has never really been used for anything, in part due to never having reclocking stable enough in general to attempt to implement dynamic clock changes based on load, etc. To avoid having to rework its interfaces, remove it entirely. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240726043828.58966-13-bskeggs@nvidia.com
2023-10-31drm/nouveau/ofa/r535: initial supportBen Skeggs
Adds support for allocating OFA classes from RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-45-skeggsb@gmail.com
2023-10-31drm/nouveau/nvjpg/r535: initial supportBen Skeggs
Adds support for allocating NVJPG classes from RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-44-skeggsb@gmail.com
2023-10-31drm/nouveau/nvenc/r535: initial supportBen Skeggs
Adds support for allocating VIDEO_ENCODER classes from RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-43-skeggsb@gmail.com
2023-10-31drm/nouveau/nvdec/r535: initial supportBen Skeggs
Adds support for allocating VIDEO_DECODER classes from RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-42-skeggsb@gmail.com
2023-10-31drm/nouveau/gr/r535: initial supportBen Skeggs
Adds support for allocating GR classes from RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-41-skeggsb@gmail.com
2023-10-31drm/nouveau/ce/r535: initial supportBen Skeggs
Adds support for allocating DMA_COPY classes from RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-40-skeggsb@gmail.com
2023-10-31drm/nouveau/fifo/r535: initial supportBen Skeggs
- Adds support for allocating CHANNEL_GPFIFO classes from RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-39-skeggsb@gmail.com
2023-10-31drm/nouveau/disp/r535: initial supportBen Skeggs
Adds support for modesetting on RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-38-skeggsb@gmail.com
2023-10-31drm/nouveau/gsp/r535: add interrupt handlingBen Skeggs
Fetches the interrupt table from RM, and hooks up the GSP interrupt handler to message queue processing to catch async messages. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-36-skeggsb@gmail.com
2023-10-31drm/nouveau/gsp/r535: add support for booting GSP-RMBen Skeggs
This commit adds the initial code needed to boot the GSP-RM firmware provided by NVIDIA, bringing with it the beginnings of Ada support. Until it's had more testing and time to bake, support is disabled by default (except on Ada). GSP-RM usage can be enabled by passing the "config=NvGspRm=1" module option. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-33-skeggsb@gmail.com
2023-10-31drm/nouveau/nvenc/tu102-: prepare for GSP-RMBen Skeggs
- (temporarily) disable if GSP-RM detected, will be added later - provide empty class list for non-GSP paths - split tu102 from gm107, it will provide host classes later Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-29-skeggsb@gmail.com
2023-10-31drm/nouveau/nvdec/tu102-: prepare for GSP-RMBen Skeggs
- (temporarily) disable if GSP-RM detected, will be added later - provide empty class list for non-GSP paths - split tu102- from gm107, they will provide host classes later - fixup HW engine instance masks Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-28-skeggsb@gmail.com
2023-10-31drm/nouveau/fifo/tu102-: prepare for GSP-RMBen Skeggs
- (temporarily) disable if GSP-RM detected, will be added later - add dtor() so GSP-RM paths can cleanup properly - add alternate engine context mapping interface for RM engines - add alternate chid interfaces to handle RM USERD oddities Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-26-skeggsb@gmail.com
2023-07-06drm/nouveau/fifo: remove left-over references to nvkm_fifo_chanBen Skeggs
This was renamed to nvkm_chan in the host rework. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Karol Herbst <kherbst@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230525003106.3853741-5-skeggsb@gmail.com
2022-11-09drm/nouveau/gr/ga102: initial supportBen Skeggs
v2: - whitespace Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Gourav Samaiya <gsamaiya@nvidia.com>
2022-11-09drm/nouveau/acr/ga102: initial supportBen Skeggs
v2. fixup for ga103 early merge Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Gourav Samaiya <gsamaiya@nvidia.com>
2022-11-09drm/nouveau/fb/ga102: load and boot VPR scrubber FWBen Skeggs
v2. fixup for ga103 early merge Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Gourav Samaiya <gsamaiya@nvidia.com>
2022-11-09drm/nouveau/fifo: expose function to read engine ctxsw statusBen Skeggs
Needed to support Ampere differences in gr/gf100-: Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/acr: use common falcon HS FW code for ACR FWsBen Skeggs
Adds context binding and support for FWs with a bootloader to the code that was added to load VPR scrubber HS binaries, and ports ACR over to using all of it. - gv100 split from gp108 to handle FW exit status differences Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/flcn: new code to load+boot simple HS FWs (VPR scrubber)Ben Skeggs
Adds the start of common interfaces to load and boot the HS binaries provided by NVIDIA that enable the usage of GR. ACR already handles most of this, but it's very much tied into ACR's init process, and there's other code that could benefit from reusing a lot of this stuff too (ie. VBIOS DEVINIT/PreOS, VPR scrubber). The VPR scrubber code is fairly independent, and a good first target. - adds better debug output to fw loading process, to ease bring-up/debug v2: - whitespace, 0->false Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/flcn: rework falcon resetBen Skeggs
Mostly preparation to fit in Ampere changes, but should result in reset sequences a lot closer to RM's, and perhaps help out with the issues we sometimes see reported in this area. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/sec2: unload RTOS before tearing down WPRBen Skeggs
Reset regs won't be available on Ampere while SEC2 RTOS is running, and we're apparently supposed to be doing this on earlier GPUs too. v2: - fixed some excessive indentation Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/pmu/gm20b,gp10b: boot RTOS from PMU initBen Skeggs
Cleanup before falcon changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo/ga100-: initial supportBen Skeggs
- replaces the hacked-up version that existed solely to support TTM v2. remove earlier hack preventing use of non-stall intr for fences Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2022-11-09drm/nouveau/ce/ga100-: initial supportBen Skeggs
- replaces the hacked-up version that existed solely to support TTM - noop until the next commit, adding proper support for ampere host v2. fixup for ga103 early merge Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2022-11-09drm/nouveau/fifo: add new channel classesBen Skeggs
Exposes a bunch of the new features that became possible as a result of the earlier commits. DRM will build on this in the future to add support for features such as SCG ("async compute") and multi-device rendering, as part of the work necessary to be able to write a half- decent vulkan driver - finally. For the moment, this just crudely ports DRM to the API changes. - channel class interfaces now the same for all HW classes - channel group class exposed (SCG) - channel runqueue selector exposed (SCG) - channel sub-device id control exposed (multi-device rendering) - channel names in logging will reflect creating process, not fd owner - explicit USERD allocation required by VOLTA_CHANNEL_GPFIFO_A and newer - drm is smarter about determining the appropriate channel class to use Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add new engine context handlingBen Skeggs
Builds on the context tracking that was added earlier. - marks engine context PTEs as 'priv' where possible Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add RAMFC info to nvkm_chan_funcBen Skeggs
- adds support for specifying SUBDEVICE_ID for channel - rounds non-power-of-two GPFIFO sizes down, rather than up Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add USERD info to nvkm_chan_funcBen Skeggs
And use it to cleanup multiple implementations of almost the same thing. - prepares for non-polled / client-provided USERD - only zeroes relevant "registers", rather than entire USERD Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add RAMIN info to nvkm_chan_funcBen Skeggs
Currently provided by {chan,dma,gpfifo}*.c, and those are going away. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add common runlist controlBen Skeggs
- less dependence on waiting for runlist updates, on GPUs that allow it - supports runqueue selector in RAMRL entries - completes switch to common runl/cgrp/chan topology info Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add chan start()/stop()Ben Skeggs
- nvkm_chan_error() built on top, stops channel and sends 'killed' event - removes an odd double-bashing of channel enable regs on kepler and up - pokes doorbell on turing and up, after enabling channel Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add runlist wait()Ben Skeggs
- adds g8x/turing registers, which were missing before - switches fermi to polled wait, like later hw (see: 4f2fc25c0f8bc...) Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add new engine context trackingBen Skeggs
Channel groups have somewhat more complicated requirements than what we currently support. An engine context is shared between all channels in a channel group, VEID/subctx support (later) brings per-VEID components, and we need to track an individual channel's engine context pointers. This commit adds the structures and refcounting to support the above, wrapping the prior implementation for the moment. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add new channel lookup interfacesBen Skeggs
- supports per-runlist CHIDs - channel group lock held across reference, rather than global lock v2: - remove unnecessary parenthesis Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: tidy up non-stall intr handlingBen Skeggs
- removes a layer of indirection in the intr handling - prevents non-stall ctrl racing with unknown intrs Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: use runlist engine info to lookup engine classesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add cgrp, have all channels be part of oneBen Skeggs
Engine context tracking will move to nvkm_cgrp in later commits, so we create SW-only channel groups on HW without support for them. - switches to nvkm_chid for TSG/channel ID allocation Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add common runlist/engine topologyBen Skeggs
Creates an nvkm_runl for each runlist on the GPU, and an nvkm_engn for each engine that is reachable from a runlist. - basically what gk104- already does, but extended to all chips - adds per-runlist CHID allocators (Ampere) - splits g98/gt2xx out from g84 (different target engines) Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add runqBen Skeggs
Creates an nvkm_runq for each PBDMA, these will be associated with the relevant runlist(s) later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add chid allocatorBen Skeggs
We need to be able to allocate TSG IDs as well as channel IDs, also, Ampere has per-runlist channel IDs. - holds per-ID private data, which will be used for/to protect lookup - holds an nvkm_event which will be used for events tied to IDs - not used yet beyond setup, and switching use of "fifo->nr - 1" for channel ID mask to "chid->mask" Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: unify handling of channel classesBen Skeggs
Adds the basic skeleton for common channel (group) interfaces. - common behaviour between <gk104 and >=gk104 impl's - separates priv/user channel objects - passthrough to existing object for now, kludges removed later Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: add chid_nr()Ben Skeggs
- reads channel count from GPU from gm200 onwards - removes gm20b/gp10b (they become identical to gm200/gp100) Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: expose channel killed in host channel event classBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/fifo: expose non-stall intr in host channel event classBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/disp: switch vblank semaphore release to nvkm_event_ntfyBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
generated by cgit (git 2.34.1) at 2025-07-15 15:51:35 +0000